Which chip and whatever happened to Mueta and UCD?

Hi,

I spent some hours simulating similar idea. I used fixed frequency average current mode control loop on load current. Actually it was not load current but filter capacitor current substracted from switching stage current. Results were not so spectactular, maybe it would be a good idea to sum with feedforward of capacitor current like in Mueta. Phase shift oscillator would maybe have better bandwidth, but would not work into noload condition. Also highly inductive load may be problematic.
But I think it is idea worth of consideration.

Best regards,

Jaka Racman
 
The amplifier that I have designed is a voltage controlled current source. It is based on a self oscillating hysteretic current loop which uses the return current from the load and capacitor in order to turn on the hi and lo switches. The performance is pretty good but I have had to work on it for quite some time in order to optimize the regulation loop. The THD at 1kHz/1W is about -90dB and about -83dB at full power 1kHz. At 7kHz/1W the THD is at about -80dB. The bandwidth is about 70kHz in 8ohms and it is completely flat up til about 30kHz.

I have received very good listening comments on it so it is definitely possible to design with this technique allthough the measurement results aren´t as good as with ucd.

I have also designed a fully working transient model of a similar circuit but with the current sense point moved to the actual load current. This current is then fed back to a zero hysteresis comparator in order to create phase modulation. The advantage is that the switching frequency varies less than with hysteretic loops and thereby I can apply more feedback at higher frequencies. It should ideally have about the same performance as ucd or what do you say Bruno?
 
Pabo said:
It should ideally have about the same performance as ucd
If your dead time and loop gain are the same I should hope the THD results are similar too.
I can't quite estimate these factors from your description. UcD's loop gain is around 34dB (f<=20kHz) and dead time is on the order of 20..50ns.

What interests me most is: if your output is a current source, have you modified the speakers in order to have a flat frequency response under this condition?
 
Sorry, forgot to explain that.

I have a voltage loop around the output filter correcting the output amplitude and linearising it further. This voltage loop is of integrator type and it applies about 15dB of feedback at 20kHz giving low enough output impedance for most applications. It is also combined with a small zobel network in order to reduce filter peaking at high inductive loading. At 1kHz and down the feedback is about 37db giving about 10mohms of output impedance down to 20Hz.
 
By the way, does anyone know a lot about the distorsion factors in self oscillating classd amp? I can imagine why there is symmetric distorsion like third order but I don´t understand where the second harmonc comes from. How does the propagation delay affect the performance? Does it only add phase lag or does it cause some kind of nonlinearity as it affects higher amplitudes less where the switching frequency is lower? I know that deadtime affects the behaviour. In my amp I have about 20ns of deadtime but I also use gateresistor/diode in order to control the flank rise and fall times. I have seen that decreasing the shoot through to a certain level decreases the distorsion and the other way around. There seem to be a minimum.

I have tried both koolu and ferrite cores without any differences in performance. I have also tried to change the output capacitor without any improvements. What can be done about distorsion?

Would you care to share your experiences.
 
Hi All,
right now i checked the circuit which was posted several days ago by me here. Well.. at 10khz THD is 0.002%, ie my sound card have exactly same, when "in" to "out" itself and only 48khz sample rate is possible (no AP -no happy:), so i can reduce 2nd harmonic to zero almost. However optimal adjusting for 7khz slightly other, and for 5khz vs 10khz just a very other! At finally..for different output power optimal adjusting is different too. So this circuit haven't any THD improvement yet, but, by the way, it isn't spoiling the sound (and no improving).:(
 
Got the modules...

Hi All,

received the modules UcD from Jan-Peter late last week.

I was hoping to get them up and running over the weekend, but i have got some other stuff that needed my attention first.

Off to the Far East for the rest of this week so 'feedback' will have to be applied to this thread when i have closed the loop and returned home.

I also need to build an AES17 filter so that the AP sys1 will compunicate with me in english.......

Cheers

Sheriff
 
off topic: TDA8922

Hi,

a question to Bruno or anyone else, who knows that IC.
For our University project, a (and that's a new change) battery driven respiratory system, we use ceramic sensors with a Platinum heater. This heater consumes between 2W quiescent and approx. 15W full power whilst heavy breathing.
The size of the power stage should be small and the losses should be as low as possible. The heater temperature is to be controlled inside a few Kelvin at ca. 600°C and the power varies with the breathing flow in the milliseconds-range.

My problem is the power stage. Do you believe, it would be possible to use the TDA8922 for that application? It seems to be well suited, because we have to control really two sensors simultaneously with their appropriate heaters.
Unfortunately I don't get an evaluation board from Arrow, and they also don't know, if samples are available.

If this IC would not be suggested, I would try to design a step-up-controller instead, possibly based on a MAX 1771. The main difficulty is the needed fast response (below 1ms) of the output regarding to the control input voltage.

Thank you in advance!
Best regards, Timo
 
Re: off topic: TDA8922

tiki said:
My problem is the power stage. Do you believe, it would be possible to use the TDA8922 for that application?

Nah, you're making your life too complicated. Simply connect the heater between the power rail and the drain of a fet (one of those so-8 affairs will do comfortably, but it is totally uncritical) and drive the fet with a PWM signal at a rate of 50kHz or so. In this way you have a linear relationship between duty cycle and power (which is what you want to have a constant gain control loop).
You can make a self-oscillating loop with an LM311, a bc546/556 pair in emitter follower driving the fet.
 
Thanks for your quick answer,

a linear relationship between duty cycle and power
between duty cucle and average voltage. Additionally, the heater resistance is progressive, 2-4 times of the resistance at room temperature. But this is no problem.

Yes, I did it already with a LM393, a 7667 driver and a 2955 Fet, it functioned well. Somebody put me a bee in the bonnet to synchronise the power stage to the CPU (MSP430) clock, so I worked on a synchronisable triangle based PWM (Thanks again to John and the other people of this forum).
The second thing I did not like was the varying frequency, dependent on the modulation depth. Can this be reduced by a simple trick? It would produce too much and changing ripple on the output voltage.

But in the end your hint seems to be the easiest solution.

Cheers!
Timo
 
Somebody put me a bee in the bonnet to synchronise the power stage to the CPU (MSP430) clock, so I worked on a synchronisable triangle based PWM (Thanks again to John and the other people of this forum).

If you generate your PWM via program code then this will be achieved automatically !
This works of course only when an integer ratio between switching frequency and clock counts as synchronous ! So be a bit more specific !

Regards

Charles
 
Max. 8MHz timer clock and wanted minimum 10bit control output value resolution gives nearly 8kHz PWM frequency. I want to have an overall frequency response above 10kHz. Because of this I decided for a switching frequency in the 500kHz-range.

This schematic is the first try with this data, that the current status, not ready yet.

edit: Kindly excuse, I don't know where to ask for help on such a specific matter. The requirements for this power stage are almost the same as for audio amplifiers.

Best Regards, Timo
 
phase_accurate said:
Another solution would be delta-sigma modulation.
Since you need 0 to 100% modulation index, and since the demodulation (thermal impedance) is first order, the modulator will have to be a simple 1st order.
For a 1st order, effective resolution improves by 1.5 bits per doubling of sampling rate above pure nyquist (10khzx2=20khz).
So, you need a sampling rate of 64*20kHz=1.28MHz.

Hang on - you need the 10kHz for loop control reasons, not because the heater has 10kHz bandwidth. What's the thermal response time constant of the heater?
1ms? That would be 160Hz. The 6dB/oct noise shaper slope would be counteracted by the 6dB/oct thermal response slope above 160Hz. If you need 10 bits resolution over 10kHz and noise is flat (as above), we want the equivalent of 13 bits over 160Hz. That's 160*2*256=82kHz. That's very manageable on a microcontroller.

How's that?
 
Bruno Putzeys said:
...snip...
Your sustained attack on the UcD patent is still taken as a compliment.
Bruno,

If you're happy to receive more compliments, why don't you check out the design I developed "in public" early 2002; the end-result (so far) is available at http://hem.passagen.se/johanps/Amp30_dev/Amp30D.pdf (for the full site, see http://listen.to/audioexperiment).

When I compare the first claim in your UCD patent (WO 03/090343 A2), it seems somewhat similar to what I came up with - with the notable exception that I'm not taking the feedback from after the output filter. (A somewhat alleviating fact, sound-quality-wise, may be that my circuit oscillates at a quite high frequency; around 1MHz. This alleviates the constraints on the output filter...) But the "linear input is substantially free of hysteresis", and the control circuit "controlls both the gain in the operational frequency range and the alternating switching". (To paraphrase the patent ;))

I remember that I tried to take the feedback from after the output filter at some distant point in time, but that the switching frequency then dropped too much for my taste at that time. Obviously, the extra HF-feedback RL/CL in the UCD is what makes all the difference - for some reason I didn't consider such an addition good design practice back then, but now I'll have to try it again sometime :)

Regards / Johan Sörensen.