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Class D Switching Power Amplifiers and Power D/A conversion

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Old 26th May 2012, 07:04 PM   #31
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Feel free to try two antiparallel 1N4148 from the inverting input of U2 to GND.
Without that the circuit is begging for phase reversal of U2.
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Old 26th May 2012, 10:19 PM   #32
Pafi is offline Pafi  Hungary
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Quote:
Without that the circuit is begging for phase reversal of U2.
Maybe, if signal source is AC coupled and there is no output load (or AC coupled). Otherwise there can't be such high voltage. Any of the terminals pulls down the inverting input near 0 during non-operation if there is a conductance.

For more confident error analysis more info would be fine. Readable part types, description of input, output, measured voltages on output of U2, phase splitter, then maybe others.

Last edited by Pafi; 26th May 2012 at 10:26 PM.
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Old 27th May 2012, 09:47 AM   #33
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Even if the input is theoretically DC coupled you cannot ensure a low drive impedance all the time. Especially when turning OFF/ON the entire stereo system there is a high likelihood for undefined conditions.

But yes, remote debugging is unreliable. You never get the information you would like to have.
Trying simple mods based on an educated guess is a promising approach, even if not the most scientific.
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Old 27th May 2012, 11:12 AM   #34
Pafi is offline Pafi  Hungary
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Quote:
Even if the input is theoretically DC coupled you cannot ensure a low drive impedance all the time.
As I said "if signal source is AC coupled and there is no output load (or AC coupled)"

And no low drive impedance is needed, just any conductance.

And I didn't say there is low enough impedance, just pointed out the 2 conditions needed for phase reversal at U2.

Quote:
Especially when turning OFF/ON the entire stereo system there is a high likelihood for undefined conditions.
Yes they are undefined (sadly), but we can choose a likely explanation instead of a less likely. Somebody complaining about a non-working amplifier while there is no input and no load? I guess not.

I chose a more likely explanation of non-operation, which is based on only the known facts and 1 very probable assumption (supply voltage builds up gradually, relative slowly, therefore gate-driver starts at (off, off) input state).

Last edited by Pafi; 27th May 2012 at 11:15 AM.
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Old 27th May 2012, 04:28 PM   #35
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Originally Posted by Pafi View Post
(supply voltage builds up gradually, relative slowly, therefore gate-driver starts at (off, off) input state).
Definitely also a valid theory.
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Old 27th May 2012, 11:39 PM   #36
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The results of the simulation. I reduced the additional elements (10n, 2M2) to achieve shorter settling time, otherwise the simulation lasted too long.

The triangle is little round because I've set 100 ns rise/fall time.
Attached Images
File Type: gif triangle.gif (19.8 KB, 101 views)
File Type: gif triangle without drift.gif (41.1 KB, 99 views)
File Type: gif triangle drift.gif (41.9 KB, 85 views)
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Old 28th May 2012, 12:39 AM   #37
Pafi is offline Pafi  Hungary
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And obviously the PWM AC coupling also works with clamping (as long as duty cycle is less than 100 %)
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File Type: gif PWM clamping.gif (50.5 KB, 86 views)
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Old 28th May 2012, 12:54 AM   #38
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Guys you need to cool it, infractions issued, and if the aggressive discussion continues I will close the thread. Attack ideas, keep the personal out of it! You have been warned.
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Old 28th May 2012, 02:14 PM   #39
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As far as the triangle oscillator goes, if the analysis is based on the single ended flavor (presumably the differential version is similar) then the output is not really triangle - it's exponential.

I am ignoring the DC blocking caps on the input because they represent only a small offset at 500 kHz, compared with the 10K input resistor.

There is more than one way to do this but, for an inverting opamp, V1=V2 and in this example, V1 is grounded (0 volts)
Vo(t) = -i(s) * Z(s)

where
i(s) = Vin(s) / R1

Zf = R2 || C
Zf = R2 / (S*R2*C) (in Laplace)
let a = 1/R2*C and plug it into the Zf
Zf = 1/C * [1/(S+a)]

Vo(s) = [-Vin(s) / R1] * [1/C *[1/(S+a)]]
Vo(s) = [-Vin(S) / (R1*C1)] * [1/(S+a)]

a little reverse lookup, and you find the equation in the time-domain is
V(t) = -Vin(t) / (R1*C1) * e^-t/(R2*C)

Mathematically speaking, this is an exponential rise/fall output (depending if the drive is + or -). The reason the simulation, and real-life appears triangular is because over a short enough time, the curvature is not visible. I tried it in simulator to satisfy my curiosity (exaggerate the period, like 10 seconds on, 20 seconds off) - but have not posted it yet.

An integrator circuit with just the capacitor is a true ramp. That equation is
Vo = -Vin/RC * dT (not going to derive it here). Mathematically, this is truly a straight line ramp up and down.
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Old 28th May 2012, 02:41 PM   #40
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As a boy said, the AC coupling is made with a DC restorer internally at the IR input. This idea is for easily modify the power output from the amplifier, with the only expedient of changing the power handling capability of the devices (increase or decrease current) if needed (possibly not with IRF510), and the supply itself. There is a non draw piece of the schematic, and is the power supply. It is a SMPS (Flyback giving from +-12 to +-24V) and isolated secondaries post regulated for the sawtooth generator, and the low side of the IR2110/MOSFET bootstrapping (12/15V).

I apologize by the heated discussions, That wasnīt the object of my thread.

The sawtooth as can be said in an oscilloscope is almost perfect, only some ringing in the angles, but I know that is from not well bypassed power supplies, in an previous protoboard it also happened, and when properly wired, it disappeared. Also I am sure that sawtooth generation ISNīT my trouble. It is in the negative feedback integrator the real trouble. But It appears sporadically.

Thanks to all replies.

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Last edited by Osvaldo de Banfield; 28th May 2012 at 02:47 PM.
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