Difficult to tell: other than a dummy load, I tested it on an unboxed 4" speaker.
In those conditions, it sounded normal....
No I didn't. I tested it on a regulated supply, and with unregulated supplies there would probably be ripple rejection issues.
It could probably tolerate somewhat higher supplies, but at some point, the gate voltage might become excessive, as this is not controlled in any way.
Up to +/-20V should be safe, but be careful...
Want to try on yourself? Naughty boy!Very cool!
Question: how do you change the sex of an IRF530?
(I mean in LTspice)
-E
Open the standard.mos library with a text editor, copy and paste the line of the victim transistor, and edit "nchan" into "pchan", and also edit the component name in recognizable way; when I do this kind of "operation", I add a P or a N somewhere, and I take care not to duplicate any real component.
When it's done, it looks like this:
which is an ideal complement for the IRF530.
Not very realistic in real life, at least for MOS transistors. For BJT's, it is less of an issue, you can find real components that are almost an ideal match.
I tried only on 8Ω, full power (12V supplies) and the transistors remained cool.
Only the 18µH coil was hot, but it was an ordinary iron powder (white yellow) toroid, not quite suited to the ~200KHz switching frequency
Actually I've already tried the sim with other complementary pairs, and it works nicely. So I just wanted to reproduce your original.Thanks much for the directions, cheers
-E
Edit: I believe the P version should also have Vds changed to -100
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But there is already feedback!!
R3-R6 and R6-R8 set the theoretical closed loop gain to 11, but since the open loop gain is of the same order, the resulting closed loop gain is approximately the half of that.
You could set a lower closed loop gain, this would result in an even better distortion.
Note that with this simple design, you need good quality supplies: the average gate voltage is a direct proportion of the supply voltage, and because of C6 crossing the gates, any noise on the supply rails will appear in the G-S voltages. This requires a good decoupling.
That is when you have monitor too close... then I simulated myself and I've seen it.
any reason why not to use higher switching freq?
I changed 150p to 33p or 47p
C7 does not actually set the oscillating frequency, its role is to provide some positive feedback, to make the oscillations clean and strong.
As in other UcD schemes, the frequency is set by C4, C5, the output filter, and other marginal delays in the loop, like the lowpass filtering caused by the MOS input capacitance and resistors R1 and R2.
If you attempt to act on a single element, the performances will decrease because this lowpass will tend to dominate, and will also increase the losses.
You could add follower stages before the MOS transistors, but then it would become a six-transistor UcD, not a 4...
As in other UcD schemes, the frequency is set by C4, C5, the output filter, and other marginal delays in the loop, like the lowpass filtering caused by the MOS input capacitance and resistors R1 and R2.
If you attempt to act on a single element, the performances will decrease because this lowpass will tend to dominate, and will also increase the losses.
You could add follower stages before the MOS transistors, but then it would become a six-transistor UcD, not a 4...
Elvee,
clever little circuit you have tossed our way here
.
After hours of sim to learn it, here is a version with +-20V rails. Keeping the changes from your original to the minimum to allow fair comparisons:
- limited the gate drive to 8.2V
- tweaked the emitter biases by keeping the voltage steady for proper handling of crossover over a range of supply voltages. Not the final solution (I created a 1.2V Zener...) but works for sim purposes.
- a couple of minor value changes.
With the same input as in your OP I was able to get 0,04% distortion, and even close to 0.01% by fiddling with the Zener but that’s obviously not practical.
Next I plan to analyse the PSR behaviour. On the practical side, I am getting ready to make a PCB if I may; thinking of the following (please comment):
- make it stereo, inverting the phase on one channel to avoid pumping issues
- add an input stage to provide some (needed IMO) gain, and for the phase inversion
- add PS filtering and decoupling, the usual stuff
- depending on how the PSR looks I could add a rectifier bridge for a linear unregulated supply.
The goal is to make it the (cue Mr Evil soundtrack) cheapest class-D amp on the planet (but not the worst), so suggestions in this direction are welcome, eg for dirt cheap output mosfet pairs (say TO-220).
Given the circuit’s simplicity, a one layer board is probably overkill Do they make half-layers PCBs?
Again, great job Elvee.
E
clever little circuit you have tossed our way here
.After hours of sim to learn it, here is a version with +-20V rails. Keeping the changes from your original to the minimum to allow fair comparisons:
- limited the gate drive to 8.2V
- tweaked the emitter biases by keeping the voltage steady for proper handling of crossover over a range of supply voltages. Not the final solution (I created a 1.2V Zener...) but works for sim purposes.
- a couple of minor value changes.
With the same input as in your OP I was able to get 0,04% distortion, and even close to 0.01% by fiddling with the Zener but that’s obviously not practical.
Next I plan to analyse the PSR behaviour. On the practical side, I am getting ready to make a PCB if I may; thinking of the following (please comment):
- make it stereo, inverting the phase on one channel to avoid pumping issues
- add an input stage to provide some (needed IMO) gain, and for the phase inversion
- add PS filtering and decoupling, the usual stuff
- depending on how the PSR looks I could add a rectifier bridge for a linear unregulated supply.
The goal is to make it the (cue Mr Evil soundtrack) cheapest class-D amp on the planet (but not the worst), so suggestions in this direction are welcome, eg for dirt cheap output mosfet pairs (say TO-220).
Given the circuit’s simplicity, a one layer board is probably overkill
Do they make half-layers PCBs?Again, great job Elvee.
E
Attachments
Forward biased diodes or Vbe multipliers would be OK I think, they will thermally compensate the input transistors.
Yeah, that looks sensible.
At the very least, an input buffer is necessary as the source impedance needs to be low enough.
I am afraid the PSR will be rather poor with such a low loop gain, and it will require either a very good filtering or a regulated supply.
Good luck!
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