Ok...please tell me what aditional info you need....
Thank you for responding.
The most important: control signals of gate driver. But the schematic, with test points shown, is also welcome.
+ : output signal and load, shorting method, output current before failure, the reason why you think the FET blown exactly in that moment, etc...
I prefer to know supply voltage also (measured by scope during failure).
Debugging a design needs almost every info a simulation needs.
Ok..i changed irf540z with irfb5615 and the rate of failure has decreased alot..i was unable to burn anything with more than 50 shorts.
Now i am using irfb4321 and making tests with them..
-supply voltage +-49 no load;
-shorting methods : output at or near clipping followed by short;short with no output followed by large input signal
-protection trip point 30A peak +-10%
Control signals before driver:
Low side control signals versus output after driver:
Protection versus output(short pulse...no failure with irfb4321)
Now i am using irfb4321 and making tests with them..
-supply voltage +-49 no load;
-shorting methods : output at or near clipping followed by short;short with no output followed by large input signal
-protection trip point 30A peak +-10%
Control signals before driver:
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Low side control signals versus output after driver:
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Protection versus output(short pulse...no failure with irfb4321)
An externally hosted image should be here but it was not working when we last tested it.
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...during failure of course. However the negative dead time shown by your waveform is also interesting, but not in this aspect.
5th picture is weird, can't figure out what it is.
Input signals (preferably every signals) should be measured relative to their gnd.
Protection: undeclared identifier.
Shorting method: I mean how do you make short? Piece of wires, or relay, or thiristor, etc...
I wouldn't test OCP by short. Testing with 1 or 2 ohms load and burst signal is much more informative, controllable, and safer. After this you can check real shorting.
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It seems is it much harder to have failures with 150 volt rated transistors,as soon as i have another one i will post pictures.
I can not measure signals relative to their ground since i do not have isolated probes or scope.
Picture 5 is low side mosfet signal after driver versus output during short.
Picture 6 is protection logic level(blue) versus switching bus.
I make shorts using a high amperage switch,1 ohm is normal load for me,i already tested with signal bursts.
I can not measure signals relative to their ground since i do not have isolated probes or scope
.Picture 5 is low side mosfet signal after driver versus output during short.
Picture 6 is protection logic level(blue) versus switching bus.
I make shorts using a high amperage switch,1 ohm is normal load for me
,i already tested with signal bursts.
Since i am not using your protection i can not change anything..my reaction time since event to total shutdown is around 3us.