Clocked class D in its simplest form is achieved by comparing an audio waveform against a triangle wave. Rail to rail output is obtained when the amplitude of input signal is as high as the amplitude of the triangle wave. A negative feedback loop is usually closed around the comparator, the output stage and sometimes the output filter to improve linearity. Phase shift in the PWM process and in output filter have to be considered for proper stability.
Self oscillating class D is implemented in the same way, but frequency compensation is arranged to create a phase shift oscillator, and the oscillation waveform (sine-like, it will oscillate at the frequency where phase lag plus propagation delay crosses 180 degree) is used as a triangle wave.
Self oscillating class D is implemented in the same way, but frequency compensation is arranged to create a phase shift oscillator, and the oscillation waveform (sine-like, it will oscillate at the frequency where phase lag plus propagation delay crosses 180 degree) is used as a triangle wave.
Hi Eva,
Thank you for sharing your considerable knowledge. I've found your comments so far to be very interesting. I've been meaning to write back, but I'm a little pressed for time, and you've given me so much to think about already.
Considering dead time - you mentioned before that you didn't like how the IRS2092 handles dead time. I see your point. It seems like something (dead time) that you'd want to optimize for a given system. With regard to gate drive, gate driver IC's like IRS2011 seem attractive to me, as I am not sure how to set up a gate drive section using discrete components. Speaking of which, do you have any copy-write-free gate drive examples using discrete components? Don't worry if you don't have any such references. I think for my purposes I will look at gate driver IC's.
Hmm, it seems gate drive is a tricky issue. Thank you again for your comments, I am certainly learning some things today!
Jim
Thank you for sharing your considerable knowledge. I've found your comments so far to be very interesting. I've been meaning to write back, but I'm a little pressed for time, and you've given me so much to think about already.
Considering dead time - you mentioned before that you didn't like how the IRS2092 handles dead time. I see your point. It seems like something (dead time) that you'd want to optimize for a given system. With regard to gate drive, gate driver IC's like IRS2011 seem attractive to me, as I am not sure how to set up a gate drive section using discrete components. Speaking of which, do you have any copy-write-free gate drive examples using discrete components? Don't worry if you don't have any such references. I think for my purposes I will look at gate driver IC's.
Hmm, it seems gate drive is a tricky issue. Thank you again for your comments, I am certainly learning some things today!
Jim
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The built-in current limit circuit in the IR chips such as the IRS20124, 20957 and 2092 makes use of the Rds voltage drop on the output MOSFETs when they are turned on. Have a look at the change of Rds with temperature in typical output MOSFETs. You might find that a current limit of 20A at 20C becomes 10A or less at a MOSFET temperature of 80C!
My latest design for a UCD-style amplifier has a seamless transition from output-voltage controlled feedback to output-current controlled feedback as the amplifier gets overloaded. Although I use the IRS20957 as the gate driver, I disable the internal current-limit circuitry.
My latest design for a UCD-style amplifier has a seamless transition from output-voltage controlled feedback to output-current controlled feedback as the amplifier gets overloaded. Although I use the IRS20957 as the gate driver, I disable the internal current-limit circuitry.
Very interesting stuff - so Rds increases with temperature. That is nice to know, as it sounds like it would aid in current sharing amongst groups of output devices.
Jim
Hi Eva,
Very interesting indeed. This will out me as a newbie, but I didn't realize the difference between the two before. So, 'clocked' class D employs a fixed frequency triangle wave source, and self-oscillating uses the output switching to generate a triangle source? What method is used to start the oscillation prior to a switching event of the power stage?
May I ask (to all) another shameful question: what is a UCD design? I am not familiar with the term.
Jim
Not for pro-audio use! My amps have to be tested to EN54 part 16, which requires full specified sine-wave output power at an ambient of +40C!
If only it were that simple. This amplifier drives 100V output lines through step-up transformers, and reserve current capability at the lowest input frequency is not very high. The OPT has a primary resistance measured in milliohms, unlike a speaker which might have 4 or 5 Ohms of dc resistance. The use of a step-up OPT means that the current-limit constraints are much more severe than an amp driving speakers directly, espacially for high-level LF signals. (Unfortunately for other reasons, the amplifier has to have a good LF response).
Yes, but the SMPSU that is the common supply for the two channels of the amplifier has only just got enough output current capability to drive the two channels at full-power sine-wave into the worst-case normal load. If I have to provide a X2 (or even higher) current-sense margin to ensure that I can drive both channels at full sine-wave power at elevated temperatures, then if one amplifier channel was heavily overloaded at low temperatures, it is likely that the combined currents of both channels would cause the PSU to current limit. This is an amplifier used for life safety critical voice-alarm applications, so it is imperative that an overload of any sort on one channel, does not affect the other channel in any way.
Using a current-sense mechanism that is not affected by temperature ensures that my current-limit headroom remains the same (or near enough) at all times.
Using a current-sense mechanism that is not affected by temperature ensures that my current-limit headroom remains the same (or near enough) at all times.
Hey guys,
Speaking of current sensing, could you use the output inductor as a current sense resistor? As it is reactive, I suppose you would not get linear performance out of your subsequent over-current circuitry with respect to frequency. Hmm, perhaps I've just answered my own question!
Jim
Speaking of current sensing, could you use the output inductor as a current sense resistor? As it is reactive, I suppose you would not get linear performance out of your subsequent over-current circuitry with respect to frequency. Hmm, perhaps I've just answered my own question!
Jim
Then you should say this current sensing method is not too good for life safety critical voice-alarm applications.
I could tell some things about this overload situation, and the conclusion would be that the problem is not really the changing Rdson, but I think it's not really important, since 98 % of the (ClassD designer) people won't face this problem.
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