Input to the whole circuit is PGND, +175V supply and +13V3 supply as well as signal input.
175V is intended to be 3 PFC telcom rectifiers with isolated DC outputs maxed at 58V5 and series'ed, aided by tons of 63V caps parallel on each output . This gives perfect compatibility: low line 110V: just delta connect the thee rectifiers. low line only one phase: use at limited power.
high line 230V: star connect the 3 units, hi line just 1 phase: no problem if the phase is "strong" enough".....
175V is intended to be 3 PFC telcom rectifiers with isolated DC outputs maxed at 58V5 and series'ed, aided by tons of 63V caps parallel on each output . This gives perfect compatibility: low line 110V: just delta connect the thee rectifiers. low line only one phase: use at limited power.
high line 230V: star connect the 3 units, hi line just 1 phase: no problem if the phase is "strong" enough".....
I once tried simulating some similar UCD-variation with fancy filter, but with series LC traps for carrier harmonics.
These MAY work and MAY be some different than original patent, but are always sub-optimal.
The basic PWM theory stand that modulator is linear only if the carrier is constant-amplitude and has flat distribition (triangle, sawtooth).
UcD at rated load, tuned to have optimum frequency drop can achieve that, if you suppress frequency drop, the carrier changes its amplitude.
Not good, freq. drop is your friend, not enemy.
Regards,
Adam
These MAY work and MAY be some different than original patent, but are always sub-optimal.
The basic PWM theory stand that modulator is linear only if the carrier is constant-amplitude and has flat distribition (triangle, sawtooth).
UcD at rated load, tuned to have optimum frequency drop can achieve that, if you suppress frequency drop, the carrier changes its amplitude.
Not good, freq. drop is your friend, not enemy.
Regards,
Adam
@darkfenriz: my circuit does have frequency drop! Heavy feedback and hi loop gain (=very small ripple voltage at comparator input) can linearize the output even if your conditions are not perfectly met. The only thing to "admit" in my circuit is that the output gets slightly distorted just below but very close to clipping level.
variations with series LC traps seem to generally not work according to my investigations - thats why I invented the above circuit..
variations with series LC traps seem to generally not work according to my investigations - thats why I invented the above circuit..
I have only just had a look at this idea in detail. It would seem to work well into resistive loads, but I think that the self-oscillation frequency will drop quickly if the load has much shunt capacitance. (Because of the excess phase shift caused by the load capacitance and your second output inductor). Have you checked how well it works with (say) 100nF across the output load resistor?
I did exactly this kind of investigations: Try to find a good solution for most / all load impedance / phase shift variation. Result: Capacitive load will decrease switching frequency, true, but only if the load has significant capacitive phase shift in the 6 digit frequency area. Can you think of any reasonable speaker / passive X-over combination that has significant capacitive load characteristic at these frequencies? Even a bunch of ultra-cheap piezo tweeters (not really recommended ;-) wouldn' t reach that kind of capacity. My assumption is, that reasonable loads are either inductive or high - ohmic / inductive / resistive above 250 kHz. Remember: phase shift / capacitive impedance at audio frequencies does not matter at all.......
So to answer the question from Ouboros in detail after checking:
with a resistive 4 Ohm base load, adding a 100nF cap as a shunt capacitance will reduce the frequency from ~415kHz to ~364kHz,
with a resistive 8 Ohm base load, adding a 100nF cap as a shunt capacitance will reduce the frequency from ~400kHz to ~360kHz
with a resistive 4 Ohm base load, adding a 100nF cap as a shunt capacitance will reduce the frequency from ~415kHz to ~364kHz,
with a resistive 8 Ohm base load, adding a 100nF cap as a shunt capacitance will reduce the frequency from ~400kHz to ~360kHz
Now someone needs to design a pcb for this monster
Savu, are you still interested?
mostly SMD, ICS SO-8 resistors and caps 0603 0805 etc... power semiconductors T0220, TO247 as you can see, power resistors may be through hole...
SOCD Status update and files...
PADS schematic is more or less ready...
I am now thinking of higher loop gain control topologies - so I give it away to all of you...
Feel free to layout, build, copy, distribute, (send me a prototype.. etc..) or comment on this...
The diodes at the main power bridge might not be needed.. not fully decided at this stage of development..
PADS schematic is more or less ready...
I am now thinking of higher loop gain control topologies - so I give it away to all of you...
Feel free to layout, build, copy, distribute, (send me a prototype.. etc..) or comment on this...
The diodes at the main power bridge might not be needed.. not fully decided at this stage of development..
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.