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Old 1st March 2010, 05:18 PM   #1
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Default My new working Class D TAS5630 DKD

Hi everybody,

This is my working, very simple Class D Amp capable of delivering 300+300 Watts RMS in 2 Ohm.

However due to unavailability of a heavy power supply and a good mixer, I have tested it on Soundblaster soundcard with the following data:

Voltage 32.5 Volts
Spk: 4 ohms 12" Subs.
Output : ~150W in each channel
Configuration of chip: stereo BTL mode
Board size: 80X60 mm

It is built with few changes in original Texas Instrument application note.

Please note that however TI claims the IC to be operated safely under 50 Volts, but never use more than 35 V with a 50 Hz transformer OR 43 Volts with a SMPS. Else you will burn the chip.

Please Email me if intrested in schematic & PCB layout at akjain2007@dataone.in

Thanks,
Gaurav Jain
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File Type: jpg DSCN2582.JPG (143.9 KB, 783 views)
File Type: jpg Power amp with Differential driver.JPG (110.1 KB, 806 views)
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Old 1st March 2010, 05:36 PM   #2
81bas is offline 81bas  Germany
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Would you use the ground plane, then would you not burn the TAS5630 chips even with 60V supply...
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Old 1st March 2010, 05:50 PM   #3
81bas is offline 81bas  Germany
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Quote:
Originally Posted by jash2008 View Post
It is built with few changes in original Texas Instrument application note.

Please note that however TI claims the IC to be operated safely under 50 Volts, but never use more than 35 V with a 50 Hz transformer OR 43 Volts with a SMPS. Else you will burn the chip.
You have no parallel ceramic caps for two electrolythics in your design... and it is a big mistake not to use a input 100pf ceramic caps at the inputs as shown in the reference design...
Also, seems you have used a 7812 stabilizer here, but most of them have overvoltage protection at about 35-40 volts. And it is not a good idea to power output mosfets without powering their driver...
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Old 2nd March 2010, 05:51 AM   #4
authlxl is offline authlxl  China
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oh!good works,maybe attention to output inductor and blackground noise,only single layer PCB.
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Old 2nd March 2010, 06:36 AM   #5
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Quote:
Originally Posted by 81bas View Post
Would you use the ground plane, then would you not burn the TAS5630 chips even with 60V supply...
Hi, 81BAS,

I have specifically not included groung plane in order to minimize the stray capacitance in input side.

If I would include a ground plane, It will induce noise even if the inputs are grounded.

2ndly, I haven't included the 100Pf for two reasons:

To simplify the design, & my differential driver already has a low pass at 80KHz.

Please correct me if I am wrong anywhere.

Thanks
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Old 2nd March 2010, 06:39 AM   #6
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Quote:
Originally Posted by 81bas View Post
You have no parallel ceramic caps for two electrolythics in your design... and it is a big mistake not to use a input 100pf ceramic caps at the inputs as shown in the reference design...
Also, seems you have used a 7812 stabilizer here, but most of them have overvoltage protection at about 35-40 volts. And it is not a good idea to power output mosfets without powering their driver...
I was unable to find 2.2Uf ceramic caps in my local store, so I neglected the same.
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Old 2nd March 2010, 06:45 AM   #7
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Quote:
Originally Posted by 81bas View Post
Would you use the ground plane, then would you not burn the TAS5630 chips even with 60V supply...
The board with ground plane, but still the voltage is ma 40 with a lot of noise.
This is in PBTL mode.

I dont have any access to an oscilloscope.
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Old 2nd March 2010, 09:30 AM   #8
81bas is offline 81bas  Germany
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Quote:
Originally Posted by jash2008 View Post
The board with ground plane, but still the voltage is ma 40 with a lot of noise.
This is in PBTL mode.

I dont have any access to an oscilloscope.
This is not a board with ground plane... Ground plane is a solid copper trace on the back side of PCB with a lot of vias in critical places...

Also, using 7812 stabilizer is not allowed over 35-40 volts, since it will switch off itself because of overvoltage protection. And it is a known problem, that TAS5630 chip dies in most of cases, if you connect PVDD (35-50V) without GVDD (12V).

Last edited by 81bas; 2nd March 2010 at 09:39 AM.
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Old 2nd March 2010, 01:54 PM   #9
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Quote:
Originally Posted by 81bas View Post
This is not a board with ground plane... Ground plane is a solid copper trace on the back side of PCB with a lot of vias in critical places...
Not to hijack this topic.....

When making a 2-layer board, should the groun plane cover the area of the IC or not?
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Old 2nd March 2010, 02:17 PM   #10
81bas is offline 81bas  Germany
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Originally Posted by theAnonymous1 View Post
Not to hijack this topic.....

When making a 2-layer board, should the groun plane cover the area of the IC or not?
Instead of writing of 1000 words, I post the link to the datasheet here: http://focus.ti.com/lit/ds/symlink/tas5630.pdf (reference design on pages 25, 26)
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