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Old 24th January 2010, 06:25 PM   #11
Baldin is offline Baldin  Denmark
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Quote:
Originally Posted by ChocoHolic View Post
...too bad. Pin5 would have been such a simple solution...
Anyway, good luck!

P.S:
You have a nice home page! ...and a seperate room for the home theatre!!! *envy*
Yes, that would have been a fast solution ..... I have had trouble getting it to start from the begining. Solution was to make an inner loop, that is only dominant at start up, feeding back from the comparator to the integrator instead of from the mos output.

About the homepage: Thanks ..... I don't get it updated that often though

About the separate room: Yes I know it a bit crazy ... housing prices and all .... but it's just so good ...... I'm spending a fair bit of time there relaxing .... a bit more movies, than music to be honest
Doing something about the room acoustics, is just such an improvement, and the only way to get full benefit of your speakers ....
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Old 24th January 2010, 06:26 PM   #12
Baldin is offline Baldin  Denmark
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sawreyrw
I'll try that out. Thanks
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Old 12th July 2010, 01:46 AM   #13
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Quote:
Originally Posted by sawreyrw View Post
Use an LTspice BV source. V=delay(V(in),delay_time). It works great; better that using a delay line.
I have been looking for this syntax example. It does work great.
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Old 12th July 2010, 12:42 PM   #14
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In LTspice the properly configured T-line element (ideal lossless transmission line) provides an ideal delay with higher accuracy and better computational efficiency than the b-source and it also works equally well in the frequency domain (.ac analysis).

The circuit with the unloaded output may be not oscillating because of differences in comparator gain and because of parasitic elements in the output filter. The LT part has about 80dB of open loop gain. The phase shift provided by the output filter approaches 180 degrees, but won't quite get there because of the parasitics. It is possible that there isn't enough delay from the comparator to provide the additional phase shift required for oscillation before the loop runs out of gain. Inadvertent hysteresis can also sometimes inhibit start up.

It is also possible that the circuit is actually oscillating at very high frequency and you are just not seeing it (this could explain the heating).

To work properly at a well defined frequency this sort of circuit should have lots of excess gain and cross 360 degrees of loop phase shift with a steep slope rather than very gradually sneak up on that point. Maybe the circuit needs some additional phase shift networks to better control the oscillation frequency point.

Can you provide a better description of the details of your circuit?
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Old 6th August 2010, 09:34 AM   #15
Baldin is offline Baldin  Denmark
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Hi analogspiceman

I'm trying to do a good approximation in LTSpice of different pwm amps to test out different modulators.
I have now found that using the Schmitt model seems to work really good at representing the output stage including the necessary delay.
Take a look at the UcD model here ..... anyone find any faulty conceptions in this??

Best regards Baldin
Attached Files
File Type: zip XcD Simulation - UcD.zip (1.6 KB, 54 views)
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Old 6th August 2010, 01:23 PM   #16
Baldin is offline Baldin  Denmark
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As can be seen 3. harmonics are dominating.
This simulation is of course withour dead time .... any good ideas of how to include this in the model?? ..... I'm sure these will be dominating ....
... and can anyone tell whether dead time creates more odd than even harmonics?
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Old 6th August 2010, 04:36 PM   #17
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A realistic simulation of dead time distortion requires a realistic model of the output stage. This must include the small inductances in the high current path that affect the drive signal, must include realistic gate drain capacitances in the MOSFETs and must include realistic MOSFET body diode models.

The good news is that LTspice is capable of all this and more all the while running at reasonable speed, but the bad news is that few LTspice users are capable of providing LTspice with the correct input.

For such a study, I would use simplified behavioral models for everything from the input to the driver IC output (the comparator and driver IC parts making good use of LTspice's a-devices). The bit from the driver to the output inductor would need accurate models for the pull down PNPs and for all the circuit trace inductances in the high current path. -- a.s.
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Old 7th August 2010, 06:48 AM   #18
maha22 is offline maha22  India
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'm hoping someone here can educate me on how to work through a simple
problem in LTSpice. (I'll also try the Yahoo group, but I'm having troubles
with that web page just now.)

I have a simple circuit with two NOR gates, a resistor, and a capacitor.
(Some of you might recognize it from a recent s.e.d posting.) I've appended
the LTSpice .asc contents below. When I try simulating it, I get this
error:
"Analysis: Timestep too small; initial timepoint: trouble with
or-instance a1".

None of the obvious options on the simulation command seem to make any
difference. One possibility is that I'm not using the OR gate correctly; per
the online help, I'm leaving unused inputs unconnected. But I also tried
grounding the unused inputs, and that didn't seem to make much difference.
=========================
magnetic latching relay
Bathmate UK
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Old 7th August 2010, 03:54 PM   #19
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Is changing the solver to alternate mode an obvious option, which you already tried?

Simulation menu
Control Panel
Spice
==>There you will find a field to change the solver.
Good luck
Markus
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Old 9th August 2010, 09:32 AM   #20
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Hi Baldin,

You recently asked about an LTspice model of a UcD type amplifier with variable dead time such that you might study how it influences the THD of the audio output. Today I made up a reasonably accurate, but still fast running model for LTspice. Not only does it have a comparator-driver section with variable delay time, rise time, dead time and output drive levels (voltage and current), but it also has a fully discrete element power stage that includes most of the important inductances.

I haven't played with it very much to study THD, but I ran it at moderate load with and without dead time with these results:

THD=0.017% with zero dead time
THD=0.096% with 85ns dead time

A GIF graphic and zipped file of the LTspice schematic are below:
Attached Images
File Type: gif UcD_Dead_Time.gif (42.1 KB, 144 views)
Attached Files
File Type: zip UcD_Dead_Time.zip (2.6 KB, 61 views)
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