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Old 5th January 2010, 11:18 AM   #1
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Default 500W amplifier using IRS20955 and IRFB4227

Hello everyone,

I have started building an active subwoofer using a class-d amplifier. I have built amplifiers of similar power before but never given class-d a try. All other electronics parts are already built except the class-d output stage, and I came to the conclusion that it is best to ask for your comments before I start to burn up FETs and gate drivers

The amplifier is a self-oscillating one using IRS20955 gate driver and IRFB4227, IRFP4227 or IRFB4020 FETs (this is actually one of my questions, which FET would you recommend. I will use a 4 ohm speaker). Will this gate driver be able to drive these FETs and also at which switching frequency. In the simulations I have used about 350kHz.

I have done simulations and it seems to be working. There is one thing in the simulations that is quite concerning. If I use FET models that came with the LTSpice software there is no problem, but if I use FET models that I imported from the spice models found on IRF website you can see huge currents peaks going through them. Dead time is set to max for the IRS20955.

Do you guys think this is something that will be realized when I make the PCB or is it just a glitch in the simulation or in the FET spice models? I have attached a picture to illustrate the situation. There are three pictures with different zoom. Blue graph is the upper FET gate voltage, Red graph is low FET gate voltage and green is the drain current of the upper FET.Problem.JPG

Attached is also a schematic used in the simulation model. Over current resistors and dead time resistors are not final. Any comments on this schematic are welcome.Schematic.JPG

Thanks in advance!
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Old 5th January 2010, 02:51 PM   #2
81bas is offline 81bas  Germany
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Quote:
Originally Posted by Aqualung View Post
The amplifier is a self-oscillating one using IRS20955 gate driver and IRFB4227, IRFP4227 or IRFB4020 FETs (this is actually one of my questions, which FET would you recommend. I will use a 4 ohm speaker). Will this gate driver be able to drive these FETs and also at which switching frequency. In the simulations I have used about 350kHz.

I have done simulations and it seems to be working. There is one thing in the simulations that is quite concerning. If I use FET models that came with the LTSpice software there is no problem, but if I use FET models that I imported from the spice models found on IRF website you can see huge currents peaks going through them. Dead time is set to max for the IRS20955.

Do you guys think this is something that will be realized when I make the PCB or is it just a glitch in the simulation or in the FET spice models?
Which FET is the best for class D you will find in other threads.

And the problem with the current peaks is definitely NOT because of the imported model. The problem is in the parameters of selected FET (you can compare simulations with imported and 'built in' models of some FET). The most like reason for these peaks is the slow body diode of the FET. And the max deadtime you selected does makes this problem even worse. To understand, why the body diode is a bad thing, you need to read other threads too.

BTW, I use LTSpice too, and I wonder, how precise the FETs are simulated here. For example, it is possible to see the typical gate charge curve during simulations, the Vds dependable output FET capacitance and so on.

Also, look in other threads about the preferred PCB layout for class D amps (groundplane, FET driver layout, etc). This can be in class D amp even more important than the schematics itself...

Last edited by 81bas; 5th January 2010 at 02:56 PM.
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Old 5th January 2010, 03:49 PM   #3
Eva is offline Eva  Spain
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Very important parasitics, including MOSFET package inductances and power supply inductances and capacitances, are completely missing from the schematic (and they control di/dt and dv/dt slopes during switching).

So your simulation is completely useless for evaluating switching performance, it's only useful for control loop analysis, and for that purpose the IR chip and the MOSFET can be just replaced by ideal voltage controlled voltage sources and voltage limiter blocks resulting in faster simulation. But for that purpose, output filter parasitics and crosstalk from output inductor back to the comparator and input signal would have to be considered too...
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Last edited by Eva; 5th January 2010 at 03:51 PM.
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Old 7th January 2010, 06:37 AM   #4
MOER is offline MOER  United States
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Default 500w class D

Your schematic has some serious errors.

You cannot drive the comparator chip's output directly into pin 3 of the IRS20955 as the 20955 will latch up. You should not use this chip as it has been discontinued due to noise issues on pin 3. The IRS20957 has this problem solved but you must still use a series resistor between the output of the comparator and the IRS20957. Use about 330 ohm with a capacitor between pins 3 and 4 right at the chip's leads of 100pF.

The IRS chips CANNOT drive the gates of IRFB4227's as they have a higher gate charge than the IRFB4020.

You must use totem drivers with the 4227s and use low value gate resistors (less than 5 ohms) otherwise the 4227s get hot under idle.

1 up 1 down of the 4227s is OK for 500w at 4 ohm using a +/-75v regulated supply.

If you use IRFB4020 then use 3+3 devices and use a totme driver again but you can use 10-15 ohm gate resistors with these.

Make sure that you follow good grounding and Kelvin rules in your layout

I always insert a low value (10 ohm) resistor in series between pin 13 of the IRS20955 and the centee node of the upper and lower mosfets. Then from pin 13 to pin 9 of the IRS20957 insert a catch diode rated at 400v 25-35nsec Trr right at the IC. This will prevent destruction of the 20957 if there are some unwanted switching spikes due to "poor" layout.

The PCB trace from pin 13, through the 10 ohm and to the centre node must use thick traces (3mm) and be as straight and direct as possible.

We use thousands of these chips in a design I did and I work closely with IR in Los Angeles on these issues


Steve Mantz
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Old 7th January 2010, 08:48 AM   #5
luka is offline luka  Slovenia
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Quote:
Originally Posted by MOER View Post
The IRS chips CANNOT drive the gates of IRFB4227's as they have a higher gate charge than the IRFB4020.
Very true!
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Old 11th May 2011, 03:25 PM   #6
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Originally Posted by luka View Post
Very true!
Why then rating this "1A" mosfet driver? Such driver should be able to drive much higher gate charge. The only drawback I see is heat dissipation limit on irs chip, ?!
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Old 11th May 2011, 04:21 PM   #7
luka is offline luka  Slovenia
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heat and speed! if heat is still ok, you sure can't get away with speed, let's not even talk if you wan't to drive with over 400kHz
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Old 11th May 2011, 04:41 PM   #8
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Originally Posted by luka View Post
heat and speed! if heat is still ok, you sure can't get away with speed, let's not even talk if you wan't to drive with over 400kHz
1A peak driving current should be enough for up to 1Mhz

6A mosfet driver can drive 20nS 10 000pF load, than how this 1A driver cant driver 1000pF in 20nS

EDIT: Mosfet in first schematics have 4600pF it may be too slow, But I dont think totem driver can help(if we use "bigger" mosfets), I have never seen totem pole 20nS speed. ?

Can you suggest any faster totem pole driver?

I started to build UCD using irs20957 and irfi4020 mosfets: And i have some questions:

1) Why Csd cap is only 100nF in all this diy schematics, datasheet suggest min 5uF: Will bigger cap here, and slower start up of driver prevent self oscillation ?

2) Application note AN-1141 : "precharging with VBS zenner diode" whats the purpose ?: Bootstrap cap will be charged before irs turns on (before CSD cap charge up), after all Bootstrap cap has its oven power supply, do not understand need for this zenner paralell to bootstrap cap here?

3) Should I use schotkey diode parallel to gate resistor for faster discharging ? Official IRF design NEVER use such diode

4) For example LT1106 or TL3016 comparator : why all people use positive eletrode for audio and negative for feedback : why not using positive to GND and negative for sum: feedback+ audio. Such operation show less thd in lt spice .. Is there any drawback for such operation related to comparator itself, what is minimal voltage difference that comparator change output ?

Last edited by grizlimedo; 11th May 2011 at 04:58 PM.
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Old 11th May 2011, 04:45 PM   #9
luka is offline luka  Slovenia
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look, i'm just telling you what I know, my irs has buffers, and from irs there is 100r resistors... so at best, there is 0.12A peak current... and yet IRS heats up to say 40-45C... and with 292kHz only
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Old 11th May 2011, 05:01 PM   #10
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look, i'm just telling you what I know, my irs has buffers, and from irs there is 100r resistors... so at best, there is 0.12A peak current... and yet IRS heats up to say 40-45C... and with 292kHz only
what exact buffers do you use, and can I see screenshot of your output stage? Also how buffers you use increase timings ?
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