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Old 17th December 2009, 02:31 AM   #101
Eva is offline Eva  Spain
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But there is almost no difference in Rds-on between Vgs=8V and 15V for IRFB4321. I have recommended many times to use up to 18V gate supplies, but this was with other kind of MOSFET whose Rds-on continued dropping above Vgs=10V and even above 15V.

Make the gate driver/buffers clip at 8V to 9V and use a higher value turn on resistor paralleled by a low value one in series with a 1N4148 (Vf>0.6V), so that the low value one does the first stage of gate charging (to Vgs-th plus di/dt V drop) and the high value one does the rest (the di/dt stage) in such a way that the gate charging current required for that di/dt rate does not exceed 0.4V-0.5V on the higher value resistor That way you can fine tune di/dt without much change in the time it takes to charge gates to Vgs-th. If one 1N4148 is not enough, use two in series.

Finally, use turn-off resistor and diode to control dead time, or pulse shaping with RCD. There are many good ways to control dead time not involving gate drive supply voltage, but controlling di/dt without the ability to change the voltage at which gate drive clips is very difficult.

Anyway, were IRFB4321 failing at high supply voltage and high temperature with 1000A/us? I had to reduce di/dt because IRFB4227 were failing, not due to EMI, it was ok on my layout. But 100V parts may whitstand higher di/dt. I think high di/dt is ok as long as a certain reverse recovery peak current is not reached (temperature dependent), then the risk of parasitic BJT latchup arises. Lower Qrr diodes should be reliable up to higher di/dt. Lower diode current should also allow higher di/dt.
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Last edited by Eva; 17th December 2009 at 02:35 AM.
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Old 17th December 2009, 03:32 AM   #102
khalsa is online now khalsa  India
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Default class d pcb

Hi anyone send me pcb desin irs2092 6KW with transister drive my email KHALSAAUDIOCENTER@YAHOO.COM THANKS
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Old 17th December 2009, 09:45 AM   #103
81bas is offline 81bas  Germany
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Originally Posted by ChocoHolic View Post
It's always fun again to see the ringing disapearing by increasing the snubber L !!!
There is explanation for that: RLC 'snubber' has its own resonance frequency Fr, and at this frequency RLC acts as a notch filter (resistance equals to R component at Fr). And the R component in the RLC chain lowers it's Q, making it rejecting the ringing even near of Fr.
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Old 17th December 2009, 10:14 AM   #104
mavric is offline mavric  United States
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SBL, someone needs to quion that phrase, I use it all the time. stuck by lightning, that is what I go by seeing amps with posted 2000wat, take away the # and there you go.
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Old 17th December 2009, 11:40 AM   #105
81bas is offline 81bas  Germany
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Have someone tried to build this amp on bread board?
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Old 17th December 2009, 11:51 AM   #106
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Hi, EVA,

Has Fairchild already make 200V mosfet that is as good as IR4227?
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Old 17th December 2009, 09:30 PM   #107
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Quote:
Originally Posted by Eva View Post
But there is almost no difference in Rds-on between Vgs=8V and 15V for IRFB4321. I have recommended many times to use up to 18V gate supplies, but this was with other kind of MOSFET whose Rds-on continued dropping above Vgs=10V and even above 15V.
I am planning about 10V gate drive voltage. That's why I say that 20V is more than enough for the unregulated bootstrapping voltage, which is then feeding a linear regulator.




Quote:
Originally Posted by Eva View Post
Make the gate driver/buffers clip at 8V to 9V and use a higher value turn on resistor paralleled by a low value one in series with a 1N4148 (Vf>0.6V), so that the low value one does the first stage of gate charging (to Vgs-th plus di/dt V drop) and the high value one does the rest (the di/dt stage) in such a way that the gate charging current required for that di/dt rate does not exceed 0.4V-0.5V on the higher value resistor That way you can fine tune di/dt without much change in the time it takes to charge gates to Vgs-th. If one 1N4148 is not enough, use two in series.
Finally, use turn-off resistor and diode to control dead time, or pulse shaping with RCD. There are many good ways to control dead time not involving gate drive supply voltage, but controlling di/dt without the ability to change the voltage at which gate drive clips is very difficult.
I do not like many components in the gate drive for layout optimization of the switching area. That's why intend to adjust it by the driver supply voltage, rather than by a pulse shaping network. But that's more a matter of taste and my next design will teach me if this taste is really good for me.




Quote:
Originally Posted by Eva View Post
Anyway, were IRFB4321 failing at high supply voltage and high temperature with 1000A/us? I had to reduce di/dt because IRFB4227 were failing, not due to EMI, it was ok on my layout. But 100V parts may whitstand higher di/dt. I think high di/dt is ok as long as a certain reverse recovery peak current is not reached (temperature dependent), then the risk of parasitic BJT latchup arises. Lower Qrr diodes should be reliable up to higher di/dt. Lower diode current should also allow higher di/dt.
The IRFB4321 did not fail during fast switching. I was also playing around without special di/dt limiter and was using gate drive voltages around 14V. The di/dt was far above 1kA/us. The resulting dv/dt about 8-9kV/us.
But I did not dare to settle this as my final design, because the measured parameteres were out of normal MosFet specs and not specified for IRFB4321.
Furtheron I did not test the circuit with high speed settings at high temperatures, also not above 10A and only with rails around +/-55V.

Have a look to the attached pictures.
Both showing the situation during hard switching with approx 5A freewheling current in the body diodes
of the upper MosFet. (Edit: Correction, it was about 2-3A freewheeling current.)
First the results with di/dt limiter around 500A/us. That's what I am rating a headache free design.
Second the same action without dedicated di/dt limiter - showing also the typical dip of Ugs during high di/dt due to unvoidable lead inductances.
Upper trace: Uds of lower MosFet, 50V/grid
1st lower trace: Ugs of lower MosFet, 5V/grid
2nd lower trace: voltage drop across 5mm cooper wire, may be 2-3nH measured with 5V/grid, means di/dt approx. 1.7-2.5kA/grid
Attached Images
File Type: jpg didt_lim_08Dec2007.jpg (75.6 KB, 2235 views)
File Type: jpg tofast.jpg (54.2 KB, 2141 views)

Last edited by ChocoHolic; 17th December 2009 at 09:42 PM.
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Old 17th December 2009, 09:53 PM   #108
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Originally Posted by 81bas View Post
Have someone tried to build this amp on bread board?
Most of us guess that nobody build that amp at all, so far.
The posted schematic has to many flaws for being a real design.

My old class D proto was on a breadboard, unbridged 500W / 2 Ohms.
Means bridged 1kW/4 Ohms. I used bread boards with ground plane.

P.S.
Yes, of course the RCL snubbers are following simple school book theory. But I really love to see this working in reality, inside high power stages and frequencies between 50MHz...100MHz.
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Old 18th December 2009, 09:23 PM   #109
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Quote:
Originally Posted by ChocoHolic View Post

Have a look to the attached pictures.
Both showing the situation during hard switching with approx 5A freewheling current in the body diodes
of the upper MosFet. (Edit: Correction, it was about 2-3A freewheeling current.)
First the results with di/dt limiter around 500A/us. That's what I am rating a headache free design.
Second the same action without dedicated di/dt limiter - showing also the typical dip of Ugs during high di/dt due to unvoidable lead inductances.
Upper trace: Uds of lower MosFet, 50V/grid
1st lower trace: Ugs of lower MosFet, 5V/grid
2nd lower trace: voltage drop across 5mm cooper wire, may be 2-3nH measured with 5V/grid, means di/dt approx. 1.7-2.5kA/grid
What's so worrying you on these oscillograms? di/dt itself or high gate drive dip?
It seems that IR low/high side drivers can well withstand such source inductance spikes without affecting the reliability.
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Old 18th December 2009, 11:04 PM   #110
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Originally Posted by darkfenriz View Post
What's so worrying you on these oscillograms? di/dt itself or high gate drive dip?
It seems that IR low/high side drivers can well withstand such source inductance spikes without affecting the reliability.
My concerns are about di/dt and dv/dt itself.
Usually absolute max. ratings are around 5kV/us...6kV/us.
But nothing specified for IRFB4321.
Furtheron the notes in the data sheet are typically mentioning some hundrets of A/us for di/dt, but nothing is specified under test conditions of some tousands of A/us.
It is fine to play around with values above spec. (or unspecified), but it
is often causing headache to settle the final design at such values without confirmation of the component vendor. IR answered some of my questions, but skipped this point of my questions....

The spec of the IRFB4127 is giving more confidence here.
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