IR2110 output problems

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
I have a PWM 0-5V signal and an inverted PWM 0-5V signal going into the IR2110. The following is other pins connection

COM = ground
VCC = 12V
VS = Source high side gate/drain low side gate
SD = ground
VDD = 5V
VSS = ground

Looking at the voltage to the gates, the VHO is shifted to range from 10v-17v PWM, and VLO is 0V-12V. The only problem i am noticing is, the output PWM signals are not inverted. both VHO and VLO are hight at the same time.

I have double check my input signals and they are def inverted of each other. Am I referencing the VCC and VSS to the wrong voltages?

I am also using +/-20 volt rails on the output MOSFETS, but i haven't hooked up them up to the rails as i didn't want the shoot through.

thanks for any help

sorry i can't post a schematic, but i have been going off

http://rl.pri.ee/electronics/amplifiers/class-d/version_3/index.html#output

sorry if this seems rather mundane, but I can't seem to make any sense of the data sheet for the IR2110
 
G4ME said:

I am also using +/-20 volt rails on the output MOSFETS, but i haven't hooked up them up to the rails as i didn't want the shoot through.

With +/-20V, IR2110 should be referenced to -20V. Don't connect mosfets. You will destroy them ( or IR2110 ).

If you want to see output waveforms ( without mosfets connected ), place a capacitor ( on each output of IR2110 ), in order to simulate gate-source capacitance.
 
G4ME said:
when you say refernced to -20, does that mean the 5 volt (local) connected to VDD seen in the link i posted, is 5V+(-20), so -15V referenced to ground is needed at VD?

Also 12 volt (local) connected to VCC would then be 12+(-20) = -8V? referenced to ground?
Yes.

G4ME said:
Can i still use my 0 to 5V, referenced to ground PWM?

No, you need level shifter ( transistor T1 on your link ).

Search forum. You will find all what you need.
 
G4ME

It's really hard to tell why your outputs look like they are in phase. The question comes up... How are you checking the output of the gate drive? It is a bootstrap design. Your high side supply is generated from the bootstrap cap charging. When the lowside output MOSFET is conducting the cap is charging. When the low side MOSFET is not conducting, then the bootstrap cap will create a gate voltage higher than the supply rail, by however many volts are supplied to Vcc - the diode drop. If your inputs to the IR2110 are truely out of phase, then you should have no problem even though it looks weird without the MOSFETs but check what you are referencing first.

As far as what voltages you are referencing, COM and Vss must be referenced to the -V rail that your MOSFETs will be connected to. With reference to GND and +/-20V for you MOSFETs, your input PWM to the IR2110 should be -20V to -15V. Looking at what voltages you claim, it does seem that your referencing something wrong. Is this your first class D project? Unless the reason is output power (which I doubt that it is since your voltage is only +/-20V) why would you use a split power supply? The level translation for referencing everything to the -V rail is complicating the design quite a bit without much benefit and the logic inverters are only going to add propagation time and will complicate the phase relationship at higher frequencies when the feedback starts to get mixed in. I would suggest using +/- V for the op-amps and comparator only. +V for all the output stage voltages. If you needed +/-20V then you would need to change that to +40V and that would mean probably 63V caps on the power supply which may be a little more costly but the cost is very much worth the simplicity. Also what you are referencing states 100V caps. If you already have them then no extra cost at all (you could actually save two)

In the schematic you are referencing, a dual comparator is used and connected to both IR2110 going through level translation. What happens here is that the switching waveform (even when going through the output filter) is never completely removed. Your output waveforms will be out of phase giving you audio across the load. But this also means your high frequency that is not removed, is also out of phase and goes across the load. You will get much better THD+N and S/N if you invert the audio and and use the other comparator for the other half of the bridge. This way your carrier signals are in phase when there is no audio and since they are in phase none of it goes across the load. It's common mode and cancels out even more. This is the same concept that is used in the differential amp for the feedback. The diff amp only wants what is different from the output stage. If the high frequency is not completely removed then your diff amp will allow the high freq to get mixed back in as feedback

Dave
 
Sorry for not replying to your post, but seeing my due date was looming, i spent more time with the circuit then surfing the web.

You were correct in the sense that even though the output of the gate driver was out of phase when no mosfet was connected, with the mosfet was connected the boostrap cap charged up and everything was fine, and my output to the gates was as how it should.

Regarding the use of dual supply. I have a nice 625VA +/-25V toroidal transformer with full bridge rectifier, which provides enough juice.

I will look into eliminating the high switching frequency, as it was clearly noticeable, and really hurt my THD.

Thanks again for your input
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.