Hi:
I am doing some simulations with LTSpice using a simple half bridge design with a self oscillating scheme.
I try to figure out how to limit the duty cycle from the comparator output to avoid clipping and also to avoid the oscillation stop if the modulation reach a 100 %.
My first though was to implement a kind of analog limiter , maybe a Vactrol or Audiohm element on input , controlled by a signal rectified from the output but I would like to experiment working directly on the duty cycle of the PWM signal coming from the comparator output.
I saw an application paper from On Semi doing it but this time it was using a fixed carrier example, my question is how to obtain a maximun duty cycle of maybe 10% to 90% in any condition on a self oscillating amp.
Any idea or suggestion will be welcome.
I am doing some simulations with LTSpice using a simple half bridge design with a self oscillating scheme.
I try to figure out how to limit the duty cycle from the comparator output to avoid clipping and also to avoid the oscillation stop if the modulation reach a 100 %.
My first though was to implement a kind of analog limiter , maybe a Vactrol or Audiohm element on input , controlled by a signal rectified from the output but I would like to experiment working directly on the duty cycle of the PWM signal coming from the comparator output.
I saw an application paper from On Semi doing it but this time it was using a fixed carrier example, my question is how to obtain a maximun duty cycle of maybe 10% to 90% in any condition on a self oscillating amp.
Any idea or suggestion will be welcome.
Hi Eva:
I have some ideas of how to implement a PA style limiter, maybe with an opto+Ldr or using a solid state VCA device as I saw on other audio applications but my question is if it is possible to limit the duty cycle directly on the HF carrier to avoid extra elements on the LF audio path.
Doing this and with the help of overcurrent detection(short on output or anomalous behaviour of the output mosfets) the amplifier would be more robust and reliable.
I dont know if the extra resources or complexity to implement it and the advantages are enough to discard the analog limiter solution.
I have some ideas of how to implement a PA style limiter, maybe with an opto+Ldr or using a solid state VCA device as I saw on other audio applications but my question is if it is possible to limit the duty cycle directly on the HF carrier to avoid extra elements on the LF audio path.
Doing this and with the help of overcurrent detection(short on output or anomalous behaviour of the output mosfets) the amplifier would be more robust and reliable.
I dont know if the extra resources or complexity to implement it and the advantages are enough to discard the analog limiter solution.
If you want to prevent high-side bootstrap capacitor discharge, you can monitor for how long the high side is turned on and force a short negative pulse every certain amount of time (I think that "and" logic would do).
If you want to monitor clipping, you have to check for either the high side or the low side being turned on for too long time. If you want to check for clipping, distortion and overcurrent at the same time (provided that you have already included current limiting), you can substract the input signal from the output signal divided by the gain, and fed a window comparator with the result...
If you want to monitor clipping, you have to check for either the high side or the low side being turned on for too long time. If you want to check for clipping, distortion and overcurrent at the same time (provided that you have already included current limiting), you can substract the input signal from the output signal divided by the gain, and fed a window comparator with the result...
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