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Class D Switching Power Amplifiers and Power D/A conversion

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Old 24th September 2007, 09:51 PM   #11
Eva is offline Eva  Spain
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There are essentially two things that may prevent your circuit to output the full supply voltage. One is too much attenution from the output filter at the test frequency, the other is too low maximum duty cycle. Take an oscilloscope and check by yourself how things are internally working.

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Old 24th September 2007, 10:06 PM   #12
Cyguy84 is offline Cyguy84  United States
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Quote:
Originally posted by Eva
There are essentially two things that may prevent your circuit to output the full supply voltage. One is too much attenution from the output filter at the test frequency, the other is too low maximum duty cycle. Take an oscilloscope and check by yourself how things are internally working.

Note that your filter shouldn't be producing any attenuation below 2Khz (but rather some gain), however, you seem to be testing it at 8.5Khz where there are almost 9dB of attenuation resulting in an undistorted output swing 9dB below the rails Have you taken some time to simulate the frequency response of the output filter with load?

Anyway, the whole problem seems to be a lack of understanding of class D operation and your teachers are probably going to notice this...
Thanks for this post, you have me thinking now. As I said before, I learned the second half of the Class D amp in the past two weeks, so I am still at the "learning stage" and don't have a full understanding.

As for the output filter, I tested it with a higher cutoff frequency, and it did not increase or decrease the output signal-- I don't think I am losing anything to the attenuation of the output filter.

When you say "too low maximum duty cycle", this basically means that the PWM signal should go from all to nothing, correct? I don't know of a good way to describe it, but basically if I reduced my input signal, the "modulating" part of the PWM signal reduced, so there would be an increasing length of high signal for each period, along with the modulation at the end. I've tried to keep it so that this "high signal" that occurs each period is as small as possible. Thats what you mean, correct?


You lost me when you said I was testing it at 8.5 kHz, and that 9 dB attenuation. Where did you get those numbers from?

My goal is a 10Hz to 2 kHz input, so the screenshots above were taken with the input at 1kHz. Not even sure where that 9dB figure came from.


And no, I haven't tried to simulate the output filter, so I have not tested its frequency response or simulated it. I have a basic version of microcap, you want me to plug that in and simulate it? I tried before, but it started giving me trouble, so I moved on to other things.



As for the "lack of understanding" bit at the end, it is probably safe to say I don't have nearly the understanding of most people on this forum, but to say I lack any understanding is a bit insulting. Things that are intuitive to you may not be to me, but that doesn't mean I am stupid or ignorant of what is going on.
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Old 25th September 2007, 01:22 AM   #13
BWRX is offline BWRX  United States
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Have you experimented with the Dead Time setting of the FAN73832? What do you currently have it set at? Try lowering it if you haven't already. That chip is not really suited for audio applications because a small dead time (less than a couple hundred ns) is required for good performance and low distortion (especially for full range amps).

According to the data sheet the FAN73832 has a minimum dead time setting of 300ns and a maimum of 2.3us. Don't forget that the period of a 20kHz PWM signal is 50us.
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Old 25th September 2007, 01:30 AM   #14
Cyguy84 is offline Cyguy84  United States
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Quote:
Originally posted by BWRX
Have you experimented with the Dead Time setting of the FAN73832? What do you currently have it set at? Try lowering it if you haven't already. That chip is not really suited for audio applications because a small dead time (less than a couple hundred ns) is required for good performance and low distortion (especially for full range amps).

According to the data sheet the FAN73832 has a minimum dead time setting of 300ns and a maimum of 2.3us. Don't forget that the period of a 20kHz PWM signal is 50us.

I have not experimented with that. I left it as close to the minimum as I could; I have another gate driver that has dead time of around 100ns, but I don't think that is causing me any trouble, so I haven't switched.



I did mess around with the duty cycle that was mentioned earlier. By increasing the input, I could change the PWM so that it modulated even more, and the power did go up accordingly. I was able to get 85% efficiency, which is about what I would expect.

When I looked at the signal, however, it was definitely clipping-- I picked the preamp settings to align with the triangle wave, so I prefer getting the least distortion out of that step. Decreasing the input lowered the efficiency, but brought the input sine wave back to inside the triangle wave, which is how I designed it.


It is good to know, I can explain that that is why I don't have the 85% efficiency that I was expecting.
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Old 25th September 2007, 01:34 AM   #15
Cyguy84 is offline Cyguy84  United States
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Just checked-- the other one is the 7384, which is a 14 pin Surface mount... but it can do 100ns.

Probably not best suited to audio, but this design isn't going to ever be built-- I just need it to work.
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Old 25th September 2007, 01:42 AM   #16
BWRX is offline BWRX  United States
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Quote:
Originally posted by Cyguy84
Decreasing the input lowered the efficiency, but brought the input sine wave back to inside the triangle wave, which is how I designed it.
You always want the audio signal to be lower than the traingle wave (when using a bootstrap cap that charges up when the output goes low). You need this because the bootstrap cap needs some time to recharge. If the input signal goes higher than the triangle wave then the bridge tries to keep the high side turned on for a while, the bootstrap cap will discharge, and the upper FET will begin to turn off.

That doesn't look like it's happening in your waveforms but it's something to keep in mind.
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Old 25th September 2007, 12:52 PM   #17
Eva is offline Eva  Spain
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Sorry, I thought that the 57us figure from your pictures was from the cursors, that's how I figured out those 8.5Khz. The -9dB@8.5Khz figure comes from simulation of the output filter.

Those oscilloscope pictures show strong slew rate limiting, so something is probably wrong with the amplifier feeding the input signal to the comparator, or with the own comparator. How much delay is the PWM comparator producing? Delay is a source of distortion and reduced output swing. You should get a 20Mhz or better oscilloscope and measure the delay from triangle wave crossing to actual MOSFET switching, and it should be preferably reduced below 500ns (5% of half 20Khz period). We can't do your homework. Also, you should consider PCBs or any other means of reducing current loop area, long wires are a big no-no.
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Old 26th September 2007, 07:34 AM   #18
maw1 is offline maw1  United States
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Don't just think of the output filtering in terms of the LC components. You already have a 2kHz pole formed by just the two output inductors and the 8 ohm resistive load. Half of your sinusoidal output voltage at 2kHz will be developed across the inductors. To get your desired output all the way up to 2kHz you'll need to bump the switch rate and reduce the inductance.

Have you fed a small DC voltage into the input, then varied it so that the amplifier sweeps over it's 0-100% modulation (or the limits of your bootstrap supply)? How linear is the input/output transfer function?

I'm assuming this is an open loop amp at this point in time?

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Old 26th September 2007, 01:45 PM   #19
Eva is offline Eva  Spain
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His output filter is fine for an 8 ohm load and 2Khz bandwidth, provided that the inductance does not change too much with output current.
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Old 26th September 2007, 05:00 PM   #20
maw1 is offline maw1  United States
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Hi Eva,

Ignore for the moment the fact that this is a switching amplifier. The Xl of the 440uH series output inductance at 2kHz is 5.5 Ohms, the load impedance is 8 Ohms. He is attempting to get 14.14 Vrms in order to produce his desired 25Wrms output. Even if he had two linear amps driving the inductors with sine waves he won't get the desired voltage output into an 8 Ohm load at 2kHz.

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