Short Version:
I am using a full bridge design, and I have PWM signals coming from my output NMOS to the inductors. Before the inductor, it is a 0-20V PWM signal... after the inductors, it is a 5-20V mostly-sine wave.
The resulting differential signal across the 8 ohm resistor has Vpp of 27V-- resulting in 11.7W.
I need 25W to get a B. That means I need the Vpp to be closer to 40. How can I get less voltage drop across this inductor?
(Inductor value: 220 uH. Capacitor value: 4uF.
Set up in typical
L-R-L
-C-
arrangement with capacitors to ground as well.)
Long version:
Hello all--
First I would like to apologize for the rushed nature of this post. I was trying to design the entire thing on my own, but I have run into a problem that I can't solve, so I would like to get a B instead of a D.
Background: I started this project with a partner, we were to build the entire amplifier over the summer. It was my partners idea, so I was basically letting him set the pace. Bad idea-- he got kicked out of my major with a GPA below 2.0, and I was left to finish his half of the project.
I have built a working Class D amplifier, full bridge, using a triangle wave and a comparator, but the output is nothing to be proud of. That was his half of the project, so I am learning it on the fly.
In order to get a B, I need 25W. I was able to get 11.7W today, but I would like any sort of expert advice on how to improve it.
Output:
For now, I think it is safe to ignore all of the circuitry before the Gate drivers. It is a basic Preamp design, with a triangle wave and a comparator, and it works within the range I need it to.
The gate drivers are Fairchild 73832 parts. I have a .22 uF capacitor acting as the boostrap capacitor to drive the high side NMOS. The NMOS are Fairchild FDB8447 parts. If you haven't noticed, I get free Fairchild stuff
I have the Gate Driver running on a 15V supply, while the NMOS power supply goes from 20V to 0V. I can increase or decrease this within any reasonable limit.
Output Filter:
I had to scurry about and make the full bridge design work, so I didn't plan things out as well as I would typically like. I took the basic design that I have seen for this sort of load-- inductors in series with the load, with a capacitor in parallel, and two capacitors to ground.
I only need the low pass filter to pass 10Hz-2kHz input, so I think my values are appropriate. Doubling the 4uF and halfing the 8 ohm load gives a basic LC filter with 220uH, 8 uF and 4 ohm load. The cutoff frequency should be somewhere around 4kHz.
If anyone wants more information, I can gladly fill in the rest of the circuit-- I am a bit ashamed of it, as it is very crude and basic, but as I said-- I had to just throw things together a bit.
Any advice on any part of this output stage would be awesome. Thank you very much!
I am using a full bridge design, and I have PWM signals coming from my output NMOS to the inductors. Before the inductor, it is a 0-20V PWM signal... after the inductors, it is a 5-20V mostly-sine wave.
The resulting differential signal across the 8 ohm resistor has Vpp of 27V-- resulting in 11.7W.
I need 25W to get a B. That means I need the Vpp to be closer to 40. How can I get less voltage drop across this inductor?
(Inductor value: 220 uH. Capacitor value: 4uF.
Set up in typical
L-R-L
-C-
arrangement with capacitors to ground as well.)
Long version:
Hello all--
First I would like to apologize for the rushed nature of this post. I was trying to design the entire thing on my own, but I have run into a problem that I can't solve, so I would like to get a B instead of a D.
Background: I started this project with a partner, we were to build the entire amplifier over the summer. It was my partners idea, so I was basically letting him set the pace. Bad idea-- he got kicked out of my major with a GPA below 2.0, and I was left to finish his half of the project.
I have built a working Class D amplifier, full bridge, using a triangle wave and a comparator, but the output is nothing to be proud of. That was his half of the project, so I am learning it on the fly.
In order to get a B, I need 25W. I was able to get 11.7W today, but I would like any sort of expert advice on how to improve it.
Output:
For now, I think it is safe to ignore all of the circuitry before the Gate drivers. It is a basic Preamp design, with a triangle wave and a comparator, and it works within the range I need it to.
The gate drivers are Fairchild 73832 parts. I have a .22 uF capacitor acting as the boostrap capacitor to drive the high side NMOS. The NMOS are Fairchild FDB8447 parts. If you haven't noticed, I get free Fairchild stuff
I have the Gate Driver running on a 15V supply, while the NMOS power supply goes from 20V to 0V. I can increase or decrease this within any reasonable limit.
Output Filter:
I had to scurry about and make the full bridge design work, so I didn't plan things out as well as I would typically like. I took the basic design that I have seen for this sort of load-- inductors in series with the load, with a capacitor in parallel, and two capacitors to ground.
I only need the low pass filter to pass 10Hz-2kHz input, so I think my values are appropriate. Doubling the 4uF and halfing the 8 ohm load gives a basic LC filter with 220uH, 8 uF and 4 ohm load. The cutoff frequency should be somewhere around 4kHz.
If anyone wants more information, I can gladly fill in the rest of the circuit-- I am a bit ashamed of it, as it is very crude and basic, but as I said-- I had to just throw things together a bit.
Any advice on any part of this output stage would be awesome. Thank you very much!
At what point will the increase in the switching frequency start causing trouble?
I can change the switching frequency basically at will-- just slap a new cap in there and it works. But the cutoff filter is the hard part, I have to order new parts if I want to change that. And I only have a week.
I think I will try pumping the switching frequency to about 40kHz, so 20X... and leaving the filter. (FYI, I put a .47 uF cap in the filter, instead of the 4, and it changed the output but did not increase the power... so I can't increase the power by moving the cutoff frequency unless I order a new inductor, I guess)
Any more advice? Thanks for the feedback, I really appreciate it-- I forgot completely about the switching frequency, and there are probably more things you guys can point out.
I can change the switching frequency basically at will-- just slap a new cap in there and it works. But the cutoff filter is the hard part, I have to order new parts if I want to change that. And I only have a week.
I think I will try pumping the switching frequency to about 40kHz, so 20X... and leaving the filter. (FYI, I put a .47 uF cap in the filter, instead of the 4, and it changed the output but did not increase the power... so I can't increase the power by moving the cutoff frequency unless I order a new inductor, I guess)
Any more advice? Thanks for the feedback, I really appreciate it-- I forgot completely about the switching frequency, and there are probably more things you guys can point out.
If you are using toroidal inductors you can just unwind some turns to lower the inductance.
Higher switching frequencies require better PCB layout and closer consideration of parasitics. The 300-400kHz is a good range to aim for as far as class d audio amps are concerned (that's just my opinion). Higher is better, of course, because it shifts the switching frequency further away from the audio band and allows the use of a higher cutoff frequency (smaller inductors, capacitors).
Higher switching frequencies require better PCB layout and closer consideration of parasitics. The 300-400kHz is a good range to aim for as far as class d audio amps are concerned (that's just my opinion). Higher is better, of course, because it shifts the switching frequency further away from the audio band and allows the use of a higher cutoff frequency (smaller inductors, capacitors).
Yeah, this project is completely not up to my standards of work. I was told that we didn't have to do the PCB design until fall semester, so the project that I have now is just on circuit board.
There are inches of wires connecting the inductor to the resistor, and unfortunately, there is little I can do about it. Thats one reason I am trying to lessen the switching frequency for now.
Turns out the entire project needs to be built by now, but I think I will design it in PCB just for prides sake, even though it won't help my grade.
There are inches of wires connecting the inductor to the resistor, and unfortunately, there is little I can do about it. Thats one reason I am trying to lessen the switching frequency for now.
Turns out the entire project needs to be built by now, but I think I will design it in PCB just for prides sake, even though it won't help my grade.
Here is the current output. I'm getting 75% efficiency, I finally got 25W but I would like to clean it up a little.
Here is just the output waveform:
Here is the + and - of the resistive load... what is causing all the craziness?
Here is just the output waveform:
An externally hosted image should be here but it was not working when we last tested it.
Here is the + and - of the resistive load... what is causing all the craziness?
An externally hosted image should be here but it was not working when we last tested it.
Eva said:There are essentially two things that may prevent your circuit to output the full supply voltage. One is too much attenution from the output filter at the test frequency, the other is too low maximum duty cycle. Take an oscilloscope and check by yourself how things are internally working.
Note that your filter shouldn't be producing any attenuation below 2Khz (but rather some gain), however, you seem to be testing it at 8.5Khz where there are almost 9dB of attenuation resulting in an undistorted output swing 9dB below the rails
Anyway, the whole problem seems to be a lack of understanding of class D operation and your teachers are probably going to notice this...
Thanks for this post, you have me thinking now. As I said before, I learned the second half of the Class D amp in the past two weeks, so I am still at the "learning stage" and don't have a full understanding.
As for the output filter, I tested it with a higher cutoff frequency, and it did not increase or decrease the output signal-- I don't think I am losing anything to the attenuation of the output filter.
When you say "too low maximum duty cycle", this basically means that the PWM signal should go from all to nothing, correct? I don't know of a good way to describe it, but basically if I reduced my input signal, the "modulating" part of the PWM signal reduced, so there would be an increasing length of high signal for each period, along with the modulation at the end. I've tried to keep it so that this "high signal" that occurs each period is as small as possible. Thats what you mean, correct?
You lost me when you said I was testing it at 8.5 kHz, and that 9 dB attenuation. Where did you get those numbers from?
My goal is a 10Hz to 2 kHz input, so the screenshots above were taken with the input at 1kHz. Not even sure where that 9dB figure came from.
And no, I haven't tried to simulate the output filter, so I have not tested its frequency response or simulated it. I have a basic version of microcap, you want me to plug that in and simulate it? I tried before, but it started giving me trouble, so I moved on to other things.
As for the "lack of understanding" bit at the end, it is probably safe to say I don't have nearly the understanding of most people on this forum, but to say I lack any understanding is a bit insulting. Things that are intuitive to you may not be to me, but that doesn't mean I am stupid or ignorant of what is going on.
Have you experimented with the Dead Time setting of the FAN73832? What do you currently have it set at? Try lowering it if you haven't already. That chip is not really suited for audio applications because a small dead time (less than a couple hundred ns) is required for good performance and low distortion (especially for full range amps).
According to the data sheet the FAN73832 has a minimum dead time setting of 300ns and a maimum of 2.3us. Don't forget that the period of a 20kHz PWM signal is 50us.
According to the data sheet the FAN73832 has a minimum dead time setting of 300ns and a maimum of 2.3us. Don't forget that the period of a 20kHz PWM signal is 50us.
BWRX said:
I have not experimented with that. I left it as close to the minimum as I could; I have another gate driver that has dead time of around 100ns, but I don't think that is causing me any trouble, so I haven't switched.
I did mess around with the duty cycle that was mentioned earlier. By increasing the input, I could change the PWM so that it modulated even more, and the power did go up accordingly. I was able to get 85% efficiency, which is about what I would expect.
When I looked at the signal, however, it was definitely clipping-- I picked the preamp settings to align with the triangle wave, so I prefer getting the least distortion out of that step. Decreasing the input lowered the efficiency, but brought the input sine wave back to inside the triangle wave, which is how I designed it.
It is good to know, I can explain that that is why I don't have the 85% efficiency that I was expecting.
Cyguy84 said:
You always want the audio signal to be lower than the traingle wave (when using a bootstrap cap that charges up when the output goes low). You need this because the bootstrap cap needs some time to recharge. If the input signal goes higher than the triangle wave then the bridge tries to keep the high side turned on for a while, the bootstrap cap will discharge, and the upper FET will begin to turn off.
That doesn't look like it's happening in your waveforms but it's something to keep in mind.
Sorry, I thought that the 57us figure from your pictures was from the cursors, that's how I figured out those 8.5Khz. The -9dB@8.5Khz figure comes from simulation of the output filter.
Those oscilloscope pictures show strong slew rate limiting, so something is probably wrong with the amplifier feeding the input signal to the comparator, or with the own comparator. How much delay is the PWM comparator producing? Delay is a source of distortion and reduced output swing. You should get a 20Mhz or better oscilloscope and measure the delay from triangle wave crossing to actual MOSFET switching, and it should be preferably reduced below 500ns (5% of half 20Khz period). We can't do your homework. Also, you should consider PCBs or any other means of reducing current loop area, long wires are a big no-no.
Those oscilloscope pictures show strong slew rate limiting, so something is probably wrong with the amplifier feeding the input signal to the comparator, or with the own comparator. How much delay is the PWM comparator producing? Delay is a source of distortion and reduced output swing. You should get a 20Mhz or better oscilloscope and measure the delay from triangle wave crossing to actual MOSFET switching, and it should be preferably reduced below 500ns (5% of half 20Khz period). We can't do your homework. Also, you should consider PCBs or any other means of reducing current loop area, long wires are a big no-no.
Don't just think of the output filtering in terms of the LC components. You already have a 2kHz pole formed by just the two output inductors and the 8 ohm resistive load. Half of your sinusoidal output voltage at 2kHz will be developed across the inductors. To get your desired output all the way up to 2kHz you'll need to bump the switch rate and reduce the inductance.
Have you fed a small DC voltage into the input, then varied it so that the amplifier sweeps over it's 0-100% modulation (or the limits of your bootstrap supply)? How linear is the input/output transfer function?
I'm assuming this is an open loop amp at this point in time?
Cheers, Mark
Have you fed a small DC voltage into the input, then varied it so that the amplifier sweeps over it's 0-100% modulation (or the limits of your bootstrap supply)? How linear is the input/output transfer function?
I'm assuming this is an open loop amp at this point in time?
Cheers, Mark
Hi Eva,
Ignore for the moment the fact that this is a switching amplifier. The Xl of the 440uH series output inductance at 2kHz is 5.5 Ohms, the load impedance is 8 Ohms. He is attempting to get 14.14 Vrms in order to produce his desired 25Wrms output. Even if he had two linear amps driving the inductors with sine waves he won't get the desired voltage output into an 8 Ohm load at 2kHz.
Cheers, Mark
Ignore for the moment the fact that this is a switching amplifier. The Xl of the 440uH series output inductance at 2kHz is 5.5 Ohms, the load impedance is 8 Ohms. He is attempting to get 14.14 Vrms in order to produce his desired 25Wrms output. Even if he had two linear amps driving the inductors with sine waves he won't get the desired voltage output into an 8 Ohm load at 2kHz.
Cheers, Mark
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