DC offset problem

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Hi,
I'm surprised that reducing R2 to 6k reduces the output offset.
How are you measuring this offset?

200mV is a bit high, most aim for <50mV and these amps when properly set up can achieve <10mV.

It probably won't affect offset, but is Vrail=+-36Vdc OK for these chips?

The schematic shows AC coupled. Adding a source should not change the DC offset.
Or
have you got the version that is mixed AC coupled on the input and DC coupled on the NFB loop. Reducing R2 in this version will reduce offset. It's due to the complete disregard for the resistances seen by the two inputs brought about by mixing the AC & DC coupling.

Note that Leo is using DC coupling throughout. But, this only works if the source is also DC coupled, otherwise the DC route to source is blocked and you end up with mixed coupling again.
 
How are you measuring this offset?
connect red pin to the pin 3 and black pin to ground

It probably won't affect offset, but is Vrail=+-36Vdc OK for these chips?
I heard about that supply voltage under +-40 would be ok.

The schematic shows AC coupled. Adding a source should not change the DC offset.
Or
have you got the version that is mixed AC coupled on the input and DC coupled on the NFB loop. Reducing R2 in this version will reduce offset. It's due to the complete disregard for the resistances seen by the two inputs brought about by mixing the AC & DC coupling.
I dont know what the AC/DC coupled is.
Can you explain more in detail?
thanks.
 
Hi,
your link shows two schematics.

One is AC coupled i.e. it has a DC blocking capacitor at the input AND it has a DC blocking capacitor in the Negative Feedback Loop (NFB). The Input cap stops DC from your source causing output offset.
The cap in the NFB reduces the DC gain of the amp to one (+0db) and this limits the output offset to match the chipamps input offset which varies a bit with temperature and with the input pin resistances.

The second schematic shows the DC block on the NFB omitted and this raises the DC gain to match the AC gain. Now the input offset (and it's variation) is multiplied by the DC gain and appears on the output as DC offset.

Which have you installed?
 
Something, somewhere, is way off. We can hope that it is due to some "trivial" construction or measurement error.

Check your wiring and component values again, and try to make sure they are the same as the schematic.

And what sort of LOAD do you have connected to the amp's output (i.e. speaker, resistor, nothing)?

One other (somewhat remote) possibility is that radio-frequency interference (RFI) is entering your chipamp and is being rectified and showing up at the output as a DC offset. That might be less unlikely if you have your circuit only breadboarded, for example, possibly with long wire leads, etc, or have a poor layout, and/or, if there is a relatively strong source of RF nearby. But I'm guessing that it would probably take something on the order of 10mV of 1MHz or greater RF at your + input, to get 200 mV out, with part of it probably being rectified into DC, depending on the frequencies involved.

You should also measure the voltage between the grounded "signal input" (and other "ground" points) and the ground terminal at the power supply, just to be sure that your grounds layout isn't causing severe problems.

Have you measured the DC offset directly at the + input pin of the chipamp (i.e. the voltage across R2), while you're getting the 200 mV output offset? It would probably take something like 6 mV to 8mV DC, there, to get 200 mV DC out (or a similar negative offset at the chipamp's - input pin), depending somewhat on how long your ground leads are, and whether or not you've separated the signal and power ground returns.

Also, are you sure that C2 is OK? Can you measure a DC voltage across C2, when the input is grounded as it was during your testing?

And, did you measure the power supply voltages directly AT the chip's power input pins, i.e. between the actual power supply pins on the chip and your power supply's ground? If the negative power rail's voltage, AT THE CHIP, was between -4 and -5 volts instead of -36v, it could possibly cause such an output offset, with that circuit (assuming you're using the second schematic, at the link you gave).

A photo of your setup might be helpful.

Good luck.

- Tom Gootee
 
Moderator
Joined 2002
Paid Member
The circuit in figure 2 would give quite a high DC-offset with the values shown (but not 200mV definitely). I used a R2=4k7, R3=220ohm, R4=4k7 and get about 1.5mV. I also separate signal and speaker output ground by a 2.2 ohm power resistor. This seems to keep the offset down.

This is an LM4766. With full AC coupling it tends to raise the output offset to about 30-40 mV on the channels. By decreasing the input resistor R2 the offset does indeed change, and quite drastically at that. IDK the exact reason why, but peranders had explained to me why it has something to do with iinut bias currents. Also the input F3 changes and the cap must be increased to compensate.

Also the power supplies may have something to with it. A difference between the rails (uneven loading, layout issues) will show up directly as DC offset.

On a sceond note I have an amp that has no (<2mV) offset but is fully DC-coupled (no input cap) and on one of my sources gives about 300 mV output on one channel (the source has a bit of offset on that channel which is multiplied by the amp). It operates fine, though I don't use it with that source too often, if at all. No damage to speakers, except that the on-off thump is a little louder than normal - however YMMV.
 
Peter Daniel said:


The difference in power supply voltage will not affect the offset, to the point that one rail can dissapear and it will still not produce any excessive DC offset.

Thank you for commenting, Peter. I have read about some of your exquisite gainclones.

I have only simulated this circuit, with LT-Spice (which is free, by the way, from http://www.linear.com).

With the second schematic shown at the link given in the first message of this thread, i.e. the circuit with no capacitor between R3 (of the feedback divider) and ground, changing the negative rail from -36v to -4v, with the input grounded and an 8-Ohm load, causes my simulation to give an output voltage of 442.8 mv DC.

I didn't have an LM1875 OR LM3875 spice model. So I initially used one for the OPA541 power amp, from the TI website. However, I also tried it with various opamp models. And all of them gave a higher-than-normal positive output offset voltage when the negative rail was set very low. And all of the opamp and power amp spice models that I tried produced >500mv output when the negative rail was set to zero (some were MUCH greater than 500mv).

I just tried it with the first circuit, too, and observed similar results.

Perhaps the LMx875 chips behave differently. Or perhaps none of the spice models for the amps I tried are correctly modeling the power supply voltage effects, or some significant input offset or bias current effect(s).

- Tom Gootee
 
Hi,
adoption of mixed AC and DC coupling is the cause of your output offset problem.

-6mV at input times the gain of 11 (10/1+1=11) gives -66mVdc at the output.

The circuit is badly designed as shown and still wrong with your alternative NFB resistors.

The -ve input has 910r to ground.
The +ve input has 22k to ground.

The input offset current needs to be just 0.27uA to generate that level of output offset.

Small variations in input offset current WILL cause large variations in output offset voltage.
This circuit and those component values guarantee that outcome.

I do not recommend mixed AC/DC coupling in any circuit, particularly when the output is DC coupled to a load that is DC sensitive.
 
I removed the input cap.
But it still have DC offset about 50mV

I removed the R2 replace by 50kVR.
R2=1.5K
DC offset=-1mV
and
R2=5.6K
pin7=-1mV

I disconnected the R2 between pin7and ground.(no connection between pin7and ground)
The pin7 offset is -2.8V.

How to decrease the pin7 offset?
 
Hi,
the chip amp is expecting to see the same conditions on both input pins. Try to match the resistances as close as possible.

Removing the DC blocking input cap does not match the resistances, because you have a variable source impedance.

Using an unbuffered pot on the input and no DC blocker will give you a variable input filter and variable output offset.

Do you settle for close to zero offset and acceptable treble attenuation at your normal listening volume and accept that your input conditions WILL change each time you adjust the pot,
or fit a buffered attenuator,
or find/develop a better circuit.
 
Moderator
Joined 2002
Paid Member
whatsnew said:
I removed the input cap.
But it still have DC offset about 50mV

I removed the R2 replace by 50kVR.
R2=1.5K
DC offset=-1mV
and
R2=5.6K
pin7=-1mV

I disconnected the R2 between pin7and ground.(no connection between pin7and ground)
The pin7 offset is -2.8V.

How to decrease the pin7 offset?

IMO 50mV is within range for this type of amp.

If your input impedance is 1.5K (R2) you better have a capable source - that is a scary load for a lot of sources. Also you will need a huge input cap (or output cap on the source) - about 47uF - for an acceptable bass cutoff.

For any lower offset you have to bring the value of R2 down to an unacceptable value. Do NOT disconnect R2, I almost lost a good woofer like that.

If you're so scared of offset use the circuit in figure 1, with a DC-cap on the feedback network. The offset will usually be lower, and more stable. Or try a servo.

I used to be scared too, till Peter convinced me that the 60 mV or so I was getting was fine. My speakers and ears tell me this is so, so I don't worry about it anymore.
 
The 22k input shunt resistor is a good overall value and rarely the offset goes above 80mV (this greatly depends on chip itself, and some are better in this regard).

However, if you connect the preamp to your amp (buffered output, no direct connection with a potentiometer), the output impedance of the preamp will be usually low and this will substantially reduce the offset (output impedance of the preamp in parallel with input impedance of the amp)

Similarly, if using potentiometer connected directly to the amp, for most listening levels the shunt resistance will be below 5k and the offset goes down too.

So, evaluate offset in a given system, not just with the amp alone.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.