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Old 2nd January 2007, 07:26 AM   #11
gootee is offline gootee  United States
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Quote:
Originally posted by Peter Daniel


The difference in power supply voltage will not affect the offset, to the point that one rail can dissapear and it will still not produce any excessive DC offset.
Thank you for commenting, Peter. I have read about some of your exquisite gainclones.

I have only simulated this circuit, with LT-Spice (which is free, by the way, from http://www.linear.com).

With the second schematic shown at the link given in the first message of this thread, i.e. the circuit with no capacitor between R3 (of the feedback divider) and ground, changing the negative rail from -36v to -4v, with the input grounded and an 8-Ohm load, causes my simulation to give an output voltage of 442.8 mv DC.

I didn't have an LM1875 OR LM3875 spice model. So I initially used one for the OPA541 power amp, from the TI website. However, I also tried it with various opamp models. And all of them gave a higher-than-normal positive output offset voltage when the negative rail was set very low. And all of the opamp and power amp spice models that I tried produced >500mv output when the negative rail was set to zero (some were MUCH greater than 500mv).

I just tried it with the first circuit, too, and observed similar results.

Perhaps the LMx875 chips behave differently. Or perhaps none of the spice models for the amps I tried are correctly modeling the power supply voltage effects, or some significant input offset or bias current effect(s).

- Tom Gootee
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Old 2nd January 2007, 07:33 AM   #12
gootee is offline gootee  United States
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Quote:
Originally posted by gootee

Also, are you sure that C2 is OK? Can you measure a DC voltage across C2, when the input is grounded as it was during your testing?

I meant to say "C1" instead of "C2", here. I inadvertently used the component number from a simulation schematic of the circuit, instead of from the schematic at the link given.

- Tom Gootee
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Old 2nd January 2007, 10:48 AM   #13
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to AndrewT:
The second schematic

to gootee:
I measured -6mV at the + input pin.
input grounded, output no loaded

And do you still need the photo?
I changed my schematic.
lower gain
R3=1K
R4=10K
DC offset about -66mV
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Old 2nd January 2007, 11:51 AM   #14
AndrewT is offline AndrewT  Scotland
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Hi,
adoption of mixed AC and DC coupling is the cause of your output offset problem.

-6mV at input times the gain of 11 (10/1+1=11) gives -66mVdc at the output.

The circuit is badly designed as shown and still wrong with your alternative NFB resistors.

The -ve input has 910r to ground.
The +ve input has 22k to ground.

The input offset current needs to be just 0.27uA to generate that level of output offset.

Small variations in input offset current WILL cause large variations in output offset voltage.
This circuit and those component values guarantee that outcome.

I do not recommend mixed AC/DC coupling in any circuit, particularly when the output is DC coupled to a load that is DC sensitive.
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Old 2nd January 2007, 04:16 PM   #15
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I removed the input cap.
But it still have DC offset about 50mV

I removed the R2 replace by 50kVR.
R2=1.5K
DC offset=-1mV
and
R2=5.6K
pin7=-1mV

I disconnected the R2 between pin7and ground.(no connection between pin7and ground)
The pin7 offset is -2.8V.

How to decrease the pin7 offset?
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Old 2nd January 2007, 04:31 PM   #16
AndrewT is offline AndrewT  Scotland
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Hi,
the chip amp is expecting to see the same conditions on both input pins. Try to match the resistances as close as possible.

Removing the DC blocking input cap does not match the resistances, because you have a variable source impedance.

Using an unbuffered pot on the input and no DC blocker will give you a variable input filter and variable output offset.

Do you settle for close to zero offset and acceptable treble attenuation at your normal listening volume and accept that your input conditions WILL change each time you adjust the pot,
or fit a buffered attenuator,
or find/develop a better circuit.
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Old 2nd January 2007, 05:32 PM   #17
sangram is offline sangram  India
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Quote:
Originally posted by whatsnew
I removed the input cap.
But it still have DC offset about 50mV

I removed the R2 replace by 50kVR.
R2=1.5K
DC offset=-1mV
and
R2=5.6K
pin7=-1mV

I disconnected the R2 between pin7and ground.(no connection between pin7and ground)
The pin7 offset is -2.8V.

How to decrease the pin7 offset?
IMO 50mV is within range for this type of amp.

If your input impedance is 1.5K (R2) you better have a capable source - that is a scary load for a lot of sources. Also you will need a huge input cap (or output cap on the source) - about 47uF - for an acceptable bass cutoff.

For any lower offset you have to bring the value of R2 down to an unacceptable value. Do NOT disconnect R2, I almost lost a good woofer like that.

If you're so scared of offset use the circuit in figure 1, with a DC-cap on the feedback network. The offset will usually be lower, and more stable. Or try a servo.

I used to be scared too, till Peter convinced me that the 60 mV or so I was getting was fine. My speakers and ears tell me this is so, so I don't worry about it anymore.
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Old 2nd January 2007, 08:26 PM   #18
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The 22k input shunt resistor is a good overall value and rarely the offset goes above 80mV (this greatly depends on chip itself, and some are better in this regard).

However, if you connect the preamp to your amp (buffered output, no direct connection with a potentiometer), the output impedance of the preamp will be usually low and this will substantially reduce the offset (output impedance of the preamp in parallel with input impedance of the amp)

Similarly, if using potentiometer connected directly to the amp, for most listening levels the shunt resistance will be below 5k and the offset goes down too.

So, evaluate offset in a given system, not just with the amp alone.
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