3886 DC offset (again)

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I have completed my second 3886 stereo GC.

On the first, I had 19mV offset on each channel. On the new one, I have 40mV on one channel but 1.2 volts on the second. All four channels are built with identical circuits, ie inverted circuit, 270K feedback, 12K input, wire from NI to ground, Carlos FM snubbered PSU.

I have read all the results from a search on this topic but couldn't find anybody who had got such a high DC offset. Is this down to the chip? I know there is quite a variation but 1.2 volts seems excessive.

I have double checked everything else. The rails are fine. All connections are good.

I tried a 270K resistor from NI to ground but the offset went up to 4.6 volts! :eek:
 
The offset can be caluulated rather easily and if you have rathe low-ohmish resistor values only the voltage offset will have inlfuence. In your case it's 1-10 mV times the DC gain => max 300 mV!

... and if the resistor values _not_ are low-ohmish _and_ you don't have matched resistor values for each input, then you will get additional offset. Why? Current flows into the inputs and they are not small in the context _and_ they are not equal, see the datasheet for input bias offset current.

Guess why I have only 18 kohms as feedback as compared to 270 kohms?
 
Nuuk said:
Swap out completed but I am leaning ever so slightly toward PCB instead of P2P! ;) (Is there an inverted 3886 PCB out there yet?)

Yep. :cool:

But only DIY, I didn't want to spend the money for a 'professional' order.
It's a single-sided design on about 80mm x 32mm.

I guess you were talking about a board you can just buy and start soldering.
But anyway, just tell me if you are interested in pictures and details.

Sebastian. ;)

PS: Forgot a little detail: it uses SMT resistors and caps for the low power components... :rolleyes:
 
The offset can be caluulated rather easily

Are you talking about the theoretical offset? As I have just demonstrated, it doesn't always work out like that in practice, with the chip being the variable factor. :att'n:

All's well now and the amp is 'burning in'. Runs very cool, absolutely quiet even with my ear next to the speaker cones.

Picture to follow after something to eat. :cool:
 
Discrete regulators for the buffer courtesy of Andrew Rothwell.
Jfet buffers courtesy of Pedja.
Snuberred PSU courtesy of Carlos FM.

Chassis - split level design to get both snubbered PSU and buffers as close as possible to the chip.

Heatsinks are one half of a PC heatsink attached to the 10mm thick aluminium by the aluminium angle. It's much easier to work on the 3886 when it is horizontal. Chips run really cool at moderate volume levels.

10K Stepped attenuator from Ebay.

This is only a test-bench.

An externally hosted image should be here but it was not working when we last tested it.
 
Nuuk said:
Are you talking about the theoretical offset? As I have just demonstrated, it doesn't always work out like that in practice, with the chip being the variable factor. :att'n:
The IC is a variable product and unfortunately it's not very accurately specified. 1-10 mV without any distribution numbers is unfortunate and pretty rough. We know from here that the offset is 1-2 mV very often but occationally towards 10 mV! If the IC was intended for industrial applications it would have been much more specified.

... so it's good to know what you could expect in worst case.

If you take the numbers from datasheet you can really estimate how much offset is OK according to the datasheet, meaning everytihng is alright. It's an another thing if _you_ thinks it's alright.

Input offset voltage
Input bias current
Input offset bias current
Used gain

If you know these four parameters you can also calculate the offset but there are also a trick how to minimized it without trimming. The most important one is the have equal DC resistance from each input of the chip. This is something you have missed here and I suppose could be one good thing to write about at your homepage :idea:
 
Allright then. I am doing my GC's on uni-boards wireing mostly with components itself, maintaining symetry in both channels and parts as close as possible. Grounding is well done too.

Could it be that from those few mm's, sometimes one centimeter I am getting so high DC offset. Around 150-160mV? I do manage to decrease it below 1mV, but must use cap from NI to the ground, as per datasheet. And no matter what kind of PSU i am using (it has nothing to do with PSU).

How can one get low DC with basic RJM schematics. What I am doing wrong. For the fourth time.:xeye:
 
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