*technical elec question* DC offset/input impedance relation

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Ok im trying to learn the technical aspect of DC offset and its relation to input impedance. Ive read in the forums, but found no clear explanation of the following question:

How is DC offset and input impedance related? What variations in input impedance increase/decrease DC offset?

also, How does one keep DC offset low with a pot as a volume control?

I attached the circuit diagram of the gain clone im thinking of building.
 

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It just comes down to simple ohm's law. The input draws a current (input bias current) 'I' which, when drawn through an impedance of 'R' ohms, creates a voltage drop 'V' of I*R. As the signal is referenced to ground, the actual level the input sees will be offset by this amount.

Ideally, you try to null out the effects of the input bias current by providing both inverting and non-inverting inputs with the same impedance to ground.

In the schematic you posted, the impedance (and thus the offset voltage) seen by the non-inverting input will vary with the position of the pot wiper.
 
Richie, i understand how the imput impedance value in ohms is what determines the voltage drop to ground and it is what the opamp sees as input. But, isnt the input signal AC, how is this converted to a DC offset?

In my circuit, will there be large DC offset at the output (at any pot wiper position)? and maybe what forumla i need to caluclate it at any wiper position
 
DC offset is just that: DC. Therefore your signal -- which is AC -- 'rides' on top of the DC offset. The offset is there under DC or no signal conditions as a constant voltage at the output of your op-amp and, when a signal is running through the op-amp it is simply in addition to the DC offset.

Forget the input signal causing DC offset, as I mentioned in my earlier post it is the input bias current that cause it. The offset is worsened by using large value resistors to bias the inputs.

The circuit you posted will have a DC offset but, like any circuit of that type it will be harmlessly small.

You already have the formula in my earlier post to work out the DC offset. Find out the input bias current for the chip from the datasheet and it should be obvious what to do :) Just remember to work in ohms, amps and volts.
 
the largest factor in a circuit of this type, once the compensation resistor is added, will be the value of Rf. the bias and offset currents that flow into the inverting pin must also flow through the feedback resistor creating DC at the op amp output. So, the larger Rf is the more DC offest will be created.

Richie's first post explains that Ohm's Law is all you need to calculate it. He also points out that is should be harmlessly small with nearly any op amp.
 
Evan Shultz said:
Richie's first post explains that Ohm's Law is all you need to calculate it.

Well i beg to differ. a formula is useless if you don't know what values to plug in or how to apply it to the situation.
So, for the non EE here, can you guide me through calculating the DC offset for the schematic i posted.

i have:

input bias current: 0.2 uA (typical) *from datasheet as richie asked
pot value: 0 to 250K ohms
feedback: 22K ohms
shunt (NI to ground): 12K ohms
inverting to ground: 680 ohms

and of course, ohms law: V = IR ;)

i understand better through formulas and numbers than through wordy explanations, so dont be shy with the numbers. Thanks for the crash course! :smash:

ps. i know DC offset wont be a problem, this is more for my personal understanding, i would like to build something i understand, not limit myself to following a schematic and procedure blindly.
 
DC offset:

assume you have a offset voltage. in you case, this offset is multiplied by the gain of 22/0.68, not too good. this means a 10mV offset becomes over 220mV of offset.

second:

all amps draw some "Input Bias Current" and "Input Offset Current" the latter refers to the matching of bias current. if the impedance of non-inverting to ground is different then the impedance of inverting to ground, this input bias current will induce unequal voltages on each input, leading to DC offset.

input offset explains how likely matching of both resistances is to correct DC offset.



many amp circuits use capacitors to prevent the source from providing bias current to the amplifier, and in the feedback loop to reduce DC gain to 1.

in your example, chaning the pot changes the impedance of one input, thus chaning the DC offset due to input bias currents.

as for AC-DC offset well, it should be very small. such an effect is possible from the non-linear characteristics that are minimized in a good amplifier (or amplifier chip) design. this kinda thing can affect oscillators though.
 
Opamp caracteristics are always related to input.
Dc voltage error on (Ve+ - Ve-) is
Vio - Ib*(Re+ - Re-) +Iio*(Re+ + Re-)/2 + (Vdd+Vss)/(2*CMRR)
Namely:
Vio: input offset voltage
Ib: input bias current
Re+, Re-: DC impedance seen by e+ and e- inputs
Iio: input offset current
Vdd: supply positive rail
Vss: supply negative rail
CMRR: common mode rejection ratio. This last error expresses that ground is not always at the equilibrium point of opamp, which is at mid-point of supplies. In other words: dc offset error related to asymetry of supply. On a big low-frequency transient, one rail of chipamp supply can swing. Effect is that DC offset seems to "jump".

To relate the dc voltage error to output, mutiply by DC gain.

For more precisions, see on-line doc at texas instruments called "opamp for everyone". :)
 
homer09 said:


Well i beg to differ. a formula is useless if you don't know what values to plug in or how to apply it to the situation.
So, for the non EE here, can you guide me through calculating the DC offset for the schematic i posted.

i have:

input bias current: 0.2 uA (typical) *from datasheet as richie asked
pot value: 0 to 250K ohms
feedback: 22K ohms
shunt (NI to ground): 12K ohms
inverting to ground: 680 ohms

and of course, ohms law: V = IR ;)

i understand better through formulas and numbers than through wordy explanations, so dont be shy with the numbers. Thanks for the crash course! :smash:

ps. i know DC offset wont be a problem, this is more for my personal understanding, i would like to build something i understand, not limit myself to following a schematic and procedure blindly.

Assume that pot is set to top position therefore it's full length is in parallel with the shunt resistor giving a total resistance to ground of:

(250 * 12) / (250 + 12) = 11.45k

Using ohms law, voltage seen at non-inverting input:

0.2uA * 11.45k = 2.29mV

Resistance to ground seen by inverting input:

(22 * 0.68) / (22 + 0.68) = 659.6 ohms

voltage seen at inverting input:

0.2uA * 659.6 = 132uV

The difference between these two voltages is amplified by the open loop gain of the op-amp, giving an offset voltage at the output. However, the calculations above assume that the output is sat at 0V which it will not be due to offset, therefore the voltage seen by the inverting input will be different.
 
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theChris said:
why open loop gain. i would have guessed closed loop, which seems to make more sense. 100uV would give an offset of 1-10V., 2mV should be enough to rail the amplifer. 50mV would seem more reasonable then 20V in this case.


Yes, it is amplified by the closed loop gain. There is nothing magically about this offset voltage. It's just another input signal for the thing, and it will duly amplify it with the cl gain.
So, if you put a cap in the fb arm going to ground, you make the DC cl gain=1, and the offset at the output is equal to that at the input. Gain = 1.

Jan Didden
 
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Richieboy,

There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.

Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!

Jan Didden
 
janneman said:
Richieboy,

There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.

Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!

Jan Didden

The idea here is that the pot is of the linear type. The load resistor is used to change the law of the pot (aprox a log pot) Taking this into consideration, should i boost the value of the 680 ohms? What other effects does changing this value have?

Any insight on what would be the best values for pot, R1 and R2? My requirements are to keep the value of the pot 20x the value of R1 because i think this is a good ratio for the fake law. Also, i would like to keep the feedback at the same value. basically as little change as possible would be nice.
 
My mistake, it is indeed the closed loop gain, I got mixed up for a second when writing that as I was in a rush.

janneman said:
Richieboy,

There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.

Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!

Jan Didden

Jan, thanks for your comments. I think you have confused me with the original poster as it is not my circuit :) Also, I did use 22k||680 for my calculations. You are correct about the pot loading. My suggestion is to use a lin pot and 56k shunt to give a faked log law. Or keep the existing shunt resistor and use a 50k lin pot.
 
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