carlmart said:
This is the final circuit structure what I deduced.
An externally hosted image should be here but it was not working when we last tested it.
It is a balance circuit structure with high CMRR.
If connect one input to GND, it can become a circuit to creat a differential signal from a single ended signal.
carlmart said:
Doh!
Thanks for pointing out the obvious, Carlos. I honestly jumped past that schematic, entirely. The reason why is that the datasheet says: "the noise gain of the two op amps in this configuration will always be different by one, so the bandwidths will not match." And I lacked the experience to know if that was a major or minor problem.
Of course, now that you've pointed me in the right direction, I'll start with that basic 2-chip circuit, listen to it, get a feel for it's character and establish a baseline performance, then move to the other designs if necessary.
For those who don't have the datasheet handy:
Direct Single-Ended-to-Differential Conversion
Two types of circuits can create a differential output signal from
a single-ended input without the use of any other components
than resistors. The first of these is illustrated in Figure 52.
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Amp 1 has its + input driven with the input signal, while the
+ input of Amp 2 is grounded. Thus the – input of Amp 2 is
driven to virtual ground potential by its output. Therefore
Amp 1 is configured for a noninverting gain of five, (1 + RF1/RG),
because RG is connected to the virtual ground of Amp 2’s – input.
When the + input of Amp 1 is driven with a signal, the same
signal appears at the – input of Amp 1. This signal serves as an
input to Amp 2 configured for a gain of –5, (–RF2/RG). Thus the
two outputs move in opposite directions with the same gain and
create a balanced differential signal.
This circuit can work at various gains with proper resistor
selection. But in general, in order to change the gain of the
circuit, at least two resistor values will have to be changed. In
addition, the noise gain of the two op amps in this configuration
will always be different by one, so the bandwidths will not match.
The next big qustion is where to buy 4 of these chips?
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The circuit of Figure 52 has phase delay problem between Vout+ and Vout-.
We can see the invert input of AMP2 as a Virtual GND,
So AMP1 is a standard noninvert amp.
The AMP2 is a standard invert amp,the Virtual Vin is its input.
The Virtual Vin a divided voltage from Vout+.
So Virtual Vin and Vout+ have the same phase delay.
But there has phase delay between Virtual Vin and Vout-.
So there has phase delay between Vout+ and Vout-.
I simulate such circuit also shown the phase delay between Vout+ and Vout-.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
This circuit can solve the phase delay problem.
But the noninvert amp and the invert amp are totally separated.
They can not balance the difference between each other.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
This two circuits are totally balanced.
We can connect one input to GND, and it will become singal-end-to-differential-converter.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
But such circuits have serious common-mode DC drift.
Because their common-mode equivalents will like this:
An externally hosted image should be here but it was not working when we last tested it.
or this:
An externally hosted image should be here but it was not working when we last tested it.
If the OP's common-mode gain is positive will cause positive feedback loop.
This is a method to restrain the positive feedback loop.
An externally hosted image should be here but it was not working when we last tested it.
It deduce a totally balanced circuit with very high CMRR like this:
An externally hosted image should be here but it was not working when we last tested it.
Because it has very high CMRR.
So it can become a singal-end-to-differential-converter by short one input to GND.
This is a balanced amp with DC servo to eliminate DC ingredients of input signal that I made.
This is the balanced circuit with OPA604.
This is the balanced outputs with 1KHz square wave singal-end input.
This is the balanced circuit with NE5534.
This is the balanced outputs with 1KHz square wave singal-end input.
This is the balanced circuit with a OP module designed by myself.
This is the balanced outputs with 1KHz square wave singal-end input.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced circuit with OPA604.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced outputs with 1KHz square wave singal-end input.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced circuit with NE5534.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced outputs with 1KHz square wave singal-end input.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced circuit with a OP module designed by myself.
An externally hosted image should be here but it was not working when we last tested it.
This is the balanced outputs with 1KHz square wave singal-end input.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
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