T-network: the better feedback solution?

[phase_accurate]

However, what most people will forget, is that whilst the noise is increasing, you are also increasing the gain of the device, so proportinately, the output signal will be getting larger compared to the noise you are creating by using the larger resistor (so in efect, due to noise goin up by a factor proportional to the square of the increace, and the output going up by a factor exactly proportional to the increace, the SNR will actualy be improved by a factor proportional to the square root of the increace in feedback resistor value).

But with the T-network you will also increase gain while keeping resistor noise down, so there should be an improvement with the T-network.
The only disadvantage I can see at the moment is that purists may not be happy to introduce another solder junction (or even multiples, depending upon layout and construction).

Regards

Charles

[bigparsnip]

Originally posted by phase_accurate


But with the T-network you will also increase gain while keeping resistor noise down, so there should be an improvement with the T-network.
The only disadvantage I can see at the moment is that purists may not be happy to introduce another solder junction (or even multiples, depending upon layout and construction).

Regards

Charles

This is not quite the case, you do have a lower noise from the initial smaller feedback resistor, but this is amplified by the voltage divider network which gives the extra gain back. So, overall the noise gain of the amplifier will be increaced because of the voltage divider in the t-network, making the noise saving from the use of the lower value feedback resistor have a different effect than one may expect .

Anyway, I'll see if can't find the application note that I saw a few months back which deas with this rather well and post a link.

And Franz, no I haven't tried this one myself (just another one of these things for people to argue about) so I can't give you any report on what I think the difference in sound may be (if there actualy is any percieveble difference without taking this to extream levels of application)

[analog_sa]

if there actualy is any percieveble difference

Yes, there is. Most critical listeners seem to agree that low value resistors consistently sound better if the circuit can accomodate them.

[Franz G]

Yes, there is. Most critical listeners seem to agree that low value resistors consistently sound better if the circuit can accomodate them.

It definitely is, remarkably! At least with the LM Chips.

I think, because of limited bandwidth, it is not a good solution for OPA549 amps (and maybe other chips?).

Franz

[Terry_Demol]

Originally posted by bigparsnip
I think people here may have some misconception about the use of a high value resisstor as the feedback element for an op-amp (or in this case a chip amp).

What you may acheive is reducing the size of the feedback resistor being used when you use a t-network for a similar gain/input impedance combination.

This may give the apearance of two benifits to your circuit design:

one: the lower feedback resistance will alow a higher bandwidth in extreem cases where parasitic capacitances are causing band limiting of the circuit. However, at audio frequencies I doubt that this should ever become a real problem which can't be solved with proper PCB design and circuit layout.

The problem with these high impedances is not bandwidth
per se but the effect on the phase margin.

On Joes amp with an 18k IP Z, even a few pF IP C at the
non inverting IP will cause some phase shift and reduce
the already limited phase margin.

I would think the main advantage of the T network is to
reduce the resistive impedance at the - IP and hence
not eat into the phase margin.

two: this is probably the one which people will talk about the most (but isn't actualy a real benifit, but leads to poorer performance), that the lower value resistors that you are now using in your feedback network are of lower values than before and so will contribute lower noise into the signal path. BUT, what is actualy the case here is that the t-network will lead to a lower overall noise performance for the circuit once you consider it as a whole. This happens because, as you increse the feedback resistor's value, you will be increasing the amount of noise it creates by a factor proportional to the square root of the increase in value (increase the vallue of resistor by a factor of four and the noise voltage it creates will go up by a factor of two). However, what most people will forget, is that whilst the noise is increasing, you are also increasing the gain of the device, so proportinately, the output signal will be getting larger compared to the noise you are creating by using the larger resistor (so in efect, due to noise goin up by a factor proportional to the square of the increace, and the output going up by a factor exactly proportional to the increace, the SNR will actualy be improved by a factor proportional to the square root of the increace in feedback resistor value).

Therefore, in this case (as with many others) it will always be better to use a single high value feedback resistor in place of a t-network (these are only of use in two situations, firstly if you can't get hold of resistors of suficiently high values; and secondly, if you need to increace the speed of the amplifier feedback and are willing to acrifice some SNR performanceto do so) when desiging the feedback around an inverting amplifier.

Anyway, I hope I haven't missed out too much here (I missed out the bit about noise gain when using the t-network, which means that you don't have the same increace in SNR performance as with a single resistor, but I could always try and explain further if people want, but there are some good data sheets on the ti website which cover the topic better than I can) and if people have questions I can try my best to answer.

Andrew.

The explanation about noise is a bit confusing.
I'll simplify it. Let's look at Joe's model, ~22k IP R, 1 meg FB R.
The two R's will add RMS but the 1 meg will have gain of 1,
the 22k will have gain of 45.
Noise of 1 meg = 129nV/rt Hz, = 18 uV RMS (20kBW)
Noise of 22k = 19nV/rt Hz x 45 = 860 nV/rt Hz = 121uV RMS.

Since the two add RMS, noise contribution of 1M FB R is minimal
so there will be little advantage of using low Z FB network
WRT noise.

I would be looking at using the T network to lower but also
*balance* the impedances to each IP. That goes for
R and C.

Cheers,

Terry

[Joe Rasmussen]

Hi Guys

There is something that needs sorting out. As Terry said both R C needs to be matched, ideally speaking. Here R represents the DC to 'Grounds" where a ground is not only the lieteral ground but also the main output pin (Speaker out).

To set the scene, remember that I stated ealier that using 1M resistors, 8 out of ten times I would get less than 10mV DC Ofset. I would have thought that repeatable with T-network.

Let's use this T-net work as an eaxample: 22K7 input Z, 10K from (-) input - to - 100R - and finally 10K to output.

I spoke to Terry (on the phone) and got him to agree that the that the 100R is in parrallel with the 10K that comes back from the output. That means the DC path is 10K plus 10K in parallel with 100R = 10K050.

Putting that to the test, the R to ground should be 10K050 to null out the DC on the output, right? WRONG.

This what I mean when I say something needs to be sorted out. I installed the above T-network and using a trimpot set it to exactly 10K050.

One channel now showed -16mV DC Ofset and the other +17mv. That is still acceptable, but considering that both channels were sub 10mV, it makes one wonder, especially that channel to channel, that is 33mV. So the result is worse with Lo Z T-net work than single High Z 1M. That was not expected.

Tweaking the (+) R, one channel needed 11K7 and the other 8K7, rather than the theoritical 10K.050.

Since 100R is so small, you can use 10Kon (+), but measure the DC Ofset, only a larger sample size will tell us how variable the 10K value is. But ideally with T-network we have to have a method to null the DC.

BTW, I tried 3K3, 8.2R, 3K3 - one channel misbehaved into load, but the other appeared OK. So there seems to be a point at Lo-Z where it gets unpredictable, not-with-standing that it should be possible in theory.

Joe R.

PS: The 'C' part that also ideally needs to be balanced, is the AC Z Path where 'R' is the DC Z Path, both to ground. So if R value needs adjusting to null DC, the AC 'C' becomes less balanced? It would seem so.

[Joe Rasmussen]

Just did another amp, one channel the DC Ofset stayed under 10mV, in fact just @ 9mV. But the other blew out to 40mV. Still not a disaster. But it emphasises that chip sample variation now creates greater spread than before. At least this is the experience here so far.

Joe R.

[Pedja]

Originally posted by Joe Rasmussen
But ideally with T-network we have to have a method to null the DC.

Hello Joe,

Voltage developed after the first T network’s resistor is equal to the sum of the input offset voltage and input bias current multiplied by this resistor’s value (let’s assume it is 10k). That part is the same as with classic feedback, but there is more in the case of the T feedback. At this point, the shunt resistor (100R) of the T network acts like a current setting (sourcing or sinking) resistor, and this current will flow through the second series resistor (10k) of the T feedback network, normally developing a voltage across it. This practically means that the initial offset after the first resistor is amplified by the factor of 101.

In essence, it is needed to null the offset after the first 10k resistor, and this offset should be nulled completely because it will be amplified by the factor of 101 (it is, of course, anyway easier to observe it amplified at the output and to trim it toward this point).

I doubt this can be done without a trimmer. The good side is that, talking about LM3875, with about 1mV input offset voltage and typical -0.1uA input bias current and the first resistor of 10k (which produces -1mV), the chances are good this offset voltage and current developed voltage will null each other so all will stay relatively close to zero.

Pedja

[carlosfm]

Originally posted by Joe Rasmussen
Just did another amp, one channel the DC Ofset stayed under 10mV, in fact just @ 9mV. But the other blew out to 40mV. Still not a disaster. But it emphasises that chip sample variation now creates greater spread than before. At least this is the experience here so far.

Joe R.

I think that's only a question of bad luck, it has happened to me.
Usually the difference is small, but I've had those values.
These chips have a huge production drift.
A M-T pot on the NI input to ground will null DC-offset.
Sometimes the value to null DC is quite different from one channel to the other.

[Joe Rasmussen]

Originally posted by Pedja

Hello Joe,

Voltage developed after the first T network’s resistor is equal to the sum of the input offset voltage...

Pedja

Yes, that is clearly the picture that is emerging and Terry agrees with that. Basically he point out the obvious that the output will do whatever it takes to make (+) and (-) the same (zero volts) between them, but the 1mV approx remains between them, and to use his words "the T-network is working against you."

So when we go Lo-Z we really generate additional current differences and we get unbalanced sinking. It's all then getting magnified on the output.

Terry reckons that the DC Offset should be a worry as long as it's no more than 50mV. He also feels that since R and C (or DC and AC) Z paths are more important and should both be the same, so live with the Offset of less than 50mV, don't null the DC. So it may well sound better if left un-nulled.

So we may have to live with that. It also tells us that going below 10K may not be such a good idea. In fact 18K I think that Franz used, will lessen the problem.

BTW, I suspect there are going to those reading who don't have a clue what we are talking about, all this about Inputs Current versus inter-differentce Input offset voltage... it's going to go right over their heads and they are going to get discouraged, and that's a pity. We need to come with a basic guided strategy so other WILL convert to T-Network.

So I propose that we agree on a set of suitable values, such as (1) Input Z of 22K, (2) T-Network 10K-100R-10K, (3)10K on (+) to ground. This will give a voltage gain of 46 or 33dB. Also this should give sub 50mV DC Offsets - I have now tested four now and the highest ouf of that small sample is 38mV.

If we don't do this,there may well be some resistance to this 'movement.' Not all will be able to calculate T-Networks, so can we get a consensus going here? Over to you guys.

Joe R.