A quick design of a 6 ch. LM 4781 amp

[microJean]

so...here are the schematics and pcb

[microJean]

...and pcb.

[janneman]

microJean,

Impressive! What I noticed was a rather large cap directly at the input of the amps, 1nF if I see it correrctly. Aren't you concerned about capacitive loading of your source? What is the purpose of the 1nF anyway?

I would also make R7 equal to R11 to minimize offset.

Jan Didden

[microJean]

Yes, you are right, 1nF it's a litle bit high.
I use it (I think) for high frequency rejection.
The signal comes from a digital potentiometer buffered by a TL082 (FET- op amp).

About R7-R11... I didn't know the relation between them affects the offset.

I'll give it a try with both at 22k.
Thank for sugestions.

[janneman]

R7-R11: You have to remember that there is a small DC bias current in both inputs. This bias current develops an input DC voltage across the DC input impedance. If these impedances are unequal, the input DC bias will be uneual. This will be amplified (times 1 in this case) and may add to the offset. There is the chance that it actually works against the internal offset from the mismatch of the input stage etc, but generally people want to keep these error source as small as possible, also because they are temperature dependent.
There remains the matter of internal imbalance, but you tackled that by the 22uF in the feedback leg.

Input filter: You have already an RC at the input, that will take care of this. No need for an additional cap directly at the input.

Jan Didden