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Old 3rd June 2004, 04:24 PM   #1
azira is offline azira  United States
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Default Which way would be better for dealing with DC?

In trying to track down my crackling/static problems I was having, I reviewed over several schematics from the datasheet, the groupbuy PCB, and other net places. It turns out my GC circuit isn't significantly different from anyone elses. Anyway, I finally got my problem to go away leaving me with two channels with the differences shown below.

In the right hand picture, the DC on the load will be the offset from the chip. In the left hand picture, I believe the DC on the load will be the DC from the source plus the DC from the chip. If they are opposite directions this could be good, if the same direction, this could be worse.
I think that the left hand picture has a freqency dependant feedback network, which is potentially significant up to 1khz (even if I used 22uF like a lot of circuits use, this would be true up to 500 Hz). I suspect the right hand side would have a consistent low frequency pole.

Which way is better? Hopefully I can get a few objective rather than subjective answers..
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Old 3rd June 2004, 04:31 PM   #2
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Azira,

R4 should be 22k.
For C1 I use 33uf, bypassed with 0.1uf poly.

But the main reason you have high DC is R1.
22k should deal with that.
I would use a 50k pot.
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Old 3rd June 2004, 05:54 PM   #3
azira is offline azira  United States
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I think you misread what I posted. I don't have DC problems. I was posting two schemes for dealing with DC from the source that I think do nearly the same thing.

Without a capacitor in either position, any source DC would be amplified by the GC. It would be fairly easy for mild source offset to be a significant amount of offset at the load.

Just asking about the pros and cons. Thanks.
--
Danny
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Old 3rd June 2004, 06:41 PM   #4
GregGC is offline GregGC  Canada
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Default Re: Which way would be better for dealing with DC?

Quote:
Originally posted by azira
In trying to track down my crackling/static problems I was having, I reviewed over several schematics from the datasheet, the groupbuy PCB, and other net places. It turns out my GC circuit isn't significantly different from anyone elses. Anyway, I finally got my problem to go away leaving me with two channels with the differences shown below.

In the right hand picture, the DC on the load will be the offset from the chip. In the left hand picture, I believe the DC on the load will be the DC from the source plus the DC from the chip. If they are opposite directions this could be good, if the same direction, this could be worse.
I think that the left hand picture has a freqency dependant feedback network, which is potentially significant up to 1khz (even if I used 22uF like a lot of circuits use, this would be true up to 500 Hz). I suspect the right hand side would have a consistent low frequency pole.

Which way is better? Hopefully I can get a few objective rather than subjective answers..
I would use the circuit on the right.

For:
- No cap in the NFB
- Blocks the source DC 100%.
- Input cap doesn't have to be too large because the input impedance is (or it should be) much higher than the NFB R to gnd(you can use a good cap).

*** If you dont pay enough attention to the Ioffset you may get high Output DC offset Voltage. For lowest DC offset you want the value of the R between +in of the opamp and GND to be as close as possible to R2. In your case you'd have less than 10k to gnd so the output DC offset should be around 30mV at max volume(worst case) and close to 0V at min volume. You can change (as suggested above post) the pot to 50-100k and R4 to 20k. This way you'd get closer to log. response to your pot and also it'll even any differences between L an R chanels and you can use 4.7uF for the input cap.

/Greg
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Old 3rd June 2004, 08:32 PM   #5
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The circuit on the left doesn't remove DC from the source.
It minimizes DC of the amp.

The circuit of the right removes DC from the source, but you can have DC on the amp, just measure and if it's below, say, 50mv, don't worry.

I had very good results with the circuit on the left, and my sources don't have DC to worry about.

Anyway, that 100k resistor should be 22k.
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Old 3rd June 2004, 11:19 PM   #6
azira is offline azira  United States
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The pot is a log taper pot. The 100k resistor is to reference the + input to gnd so that it doesn't float if the POT gets dirty.
I didn't use expensive components on my GC, just stuff in my garage. I tried to use the schematic from the datasheet.

Thanks for the other comments about the DC blocking.
--
Danny
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Old 3rd June 2004, 11:24 PM   #7
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I'm not talking about expensive stuff...
Don't you have a pair of 22k resistors in your garage?
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Old 4th June 2004, 02:44 AM   #8
azira is offline azira  United States
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Yeah I do, I used them for the feedback... but I don't need to replace the 100k with 22k. It's already a log taper pot.
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