Basic opamp based preamp

[Corben]

Any particular reason for driving the volume pot with an opamp? I just recently made a simple opamp-based preamp myself with a 100k log volume pot followed by a 100k balance pot followed by a single gain stage and it seems to work just fine. The dc-offset does vary with the volume and balance settings, but I dealt with that and other DC-offset sources using a DC-servo loop. Opamps I used were LME49720 for the gain and LF412 for the servo.

[Stormrider]

Originally Posted by Corben

Any particular reason for driving the volume pot with an opamp? I just recently made a simple opamp-based preamp myself with a 100k log-volume pot followed by a 100k balance pot followed by a single gain stage and it seems to work just fine. The dc-offset does vary with the volume and balance settings, but I dealt with that and other DC-offset sources using a DC-servo loop. Opamps I used were LME49720 for the gain and LF412 for the servo.

So, even an opamp with FET inputs will have varying dc offset with the variable source resistance of a vol control?

Sorry to post Rod's image, but this is the balanced line driver I'm going to use. It's from P51.

[Stormrider]

New schematic with changes...

[Corben]

Originally Posted by Stormrider

So, even an opamp with FET inputs will have varying dc offset with the variable source resistance of a vol control?

I don't know whether LME49720 has FET inputs, but the datasheet shows 10nA input bias (so certainly not MOSFET anyway) and 0.1mV Vos. Considering that my amp has voltage gain of 50, it does indeed produce tens of millivolts of DC offset on the output, something that I learned only after building the first version of my little amp. (Another thing I learned the hard way with that circuit was that resistors produce significant noise. I had never even though about that before.)

Maybe the DC offset is not so much a problem for you if you only have a gain factor of two.

Also, regarding the order of the stages: I'd put the gain stage first, if possible. That way you avoid amplifying noise from the previous stages. (I learned that the hard way too.)

[Stormrider]

Just did some testing with the 2nd circuit shown with an NE5532P from Texas Instruments. Output offset varied from +3mVdc to -27mVdc with turning the vol control pot from min to max. Most of the offset is coming from the buffer; there's -20mvdc on pin 1.

I then dropped in a TL072 and output offset dropped to .1mVdc - .8mVdc. depending on where the vol control was. Big difference with the fet opamps for a direct coupled circuit.

[stratus46]

Originally Posted by Stormrider

Just did some testing with the 2nd circuit shown with an NE5532P from Texas Instruments. Output offset varied from +3mVdc to -27mVdc with turning the vol control pot from min to max. Most of the offset is coming from the buffer; there's -20mvdc on pin 1.

I then dropped in a TL072 and output offset dropped to .1mVdc - .8mVdc. depending on where the vol control was. Big difference with the fet opamps for a direct coupled circuit.

You're probably seeing the bias current of the 5532 on the 100K resistor. You might find it interesting to reduce the value of the 100K to 10-15K and see if the offset tracks toward 0. I expect it will. Unless you're interfacing with tube gear, it's probably better to stay below 22K. I usually shoot for 10K.

G²

[wahab]

Originally Posted by Stormrider

New schematic with changes...

you can use a 1k resistor from output to inverting input
of the buffer stage, rather than a short circuit, this will
greatly reduce the output dc offset of this stage by
balancing the two inputs dc impedances...

[Stormrider]

Originally Posted by stratus46

You're probably seeing the bias current of the 5532 on the 100K resistor. You might find it interesting to reduce the value of the 100K to 10-15K and see if the offset tracks toward 0. I expect it will. Unless you're interfacing with tube gear, it's probably better to stay below 22K. I usually shoot for 10K.

Tried dropping it to 10K, no change in offset voltage.

Originally Posted by wahab

you can use a 1k resistor from output to inverting input of the buffer stage, rather than a short circuit, this will
greatly reduce the output dc offset of this stage by
balancing the two inputs dc impedances...

Tried this, and even though it makes perfect sense, no change.

If I drop R2, the 100K, down to 22K the dc offset on pin 1 drops to ~5mVdc but that will make my input impedance way too low.

[Stormrider]

Just realized R2 is on the wrong side of R1. That has no effect on the offset though.

[tomchr]

R4 should be equal to the impedance "seen" by the inverting input of the op-amp. I.e. R4 = R5||Rf. For your values of 10k, 22k, R4 works out to 6.88 kOhm. 6.8k is probably close enough. Similarly, you could insert a 1k from pin 1 to pin 2 of U1A and compensate for its input bias current. This won't change the gain.

I don't see a purpose for R3. Unless you like adding thermal noise, I suggest taking it out.

I would put the amplifying stage before the volume control to avoid attenuating before amplifying. It'll be better for the noise performance, though, in your case with a 3 dB gain, you probably won't notice the difference.

I suggest bandwidth limiting the first stage. I'd set a pole there at about 200 kHz. So C =1/(2*pi*1000*200E3) = 795 pF. I'd probably use 820 pF as this is a standard value. Or 680 pF... It'll limit clicks and pops that you otherwise would get every time an appliance or other heavy energy-sucker turns on. It'll also limit EMI from your cell phone and WiFi devices.

Good circuit, though. I suggest using an LME49720. Those amps are superb. My preamp is a design similar to yours (with the changes I suggest above) except I use a PGA2310 volume control IC.

~Tom