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gainclone  OFFSET regulation LS output
gainclone  OFFSET regulation LS output
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Old 18th July 2009, 04:18 PM   #1
sigurd is offline sigurd  Belgium
diyAudio Member
Join Date: Jan 2007
Location: belgium
Default gainclone OFFSET regulation LS output

Hi, schematic for offset regulation LS on a gainclone :

the input volume control is a stepped resistor attenuator
( attention on connecting, it is as marked )

all resistors are riken

there is an offset regulation for the LS output

the value of the potmeter on the offset brigde is around 500KOhm.
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Old 20th July 2009, 04:19 PM   #2
AndrewT is offline AndrewT  Scotland
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Join Date: Jul 2004
Location: Scottish Borders
the two 10M might be a bit high.
The 500k pot is too high. You should only need a few mV of input offset to generate the current to balance out the difference in the +IN & -IN resistances and chip input offset tolerance.
Have a look at the Krell offset adjuster. It uses a diode across the adjustment pot to limit the range of adjustment and to lower the impedance and with it the noise that is injected into the +IN pin.

There is no advantage in matching the 22k on the +IN & -IN pins. You have a 680r in parallel to one of them.
The 22k on the +IN pin should be about 10times the value of the pot.
If you use an unbuffered 10k pot then change the 22k to 100k or 150k.
If you want to retain the 22k then consider moving the pot to a remote and convenient location and buffer it to reduce the output impedance to <=200r.

You must add an RF filter to the input of you power amp PCB. Consider also adding an extra capacitor to the input RCA socket.
Are you planning to add HF decoupling to the Vcc and Vee power pins?

I like the way you have shown the dirty grounds coming together before the single wire connection to the Signal Ground.
regards Andrew T.
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Old 21st July 2009, 09:23 AM   #3
pacificblue is offline pacificblue  Germany
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Join Date: May 2008
The 22k resistor from the non-inverting input to ground will be the determining factor for the offset and render the rest of the circuit useless.

The time constant to charge that 33 (330?) capacitor through a 10 M resistor is much too long. It will take several minutes to achieve a stable voltage at the connecting point between the two 10 M resistors.
If you've always done it like that, then it's probably wrong. (Henry Ford)
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