6 channel LME49830 power amp

[cuibono]

Originally posted by AndrewT
Do them as near cold as the ambient conditions will allow.

In normal use the heatsinks will warm up some. I'm interested in how warm things can be without being a danger to itself...

BTW, the Vpp and Apk are for a single ideal channel, correct?

[AndrewT]

Hi,
supply line fuses provide medium to long term protection for the amps output stages and the speakers that follow.
You must provide short term protection to prevent damaging the FETs in event of abuse.
Most builders provide low voltage Zeners across the gate source pins of the output FETs. This seems to be adequate. I prefer something a bit more complicated. Too many put in high voltage Zeners that do almost nothing to protect the amplifier.

But, when these Zeners conduct they make take out the driver stage. Think about protection a bit more if you have external cables connecting the amps to the loads.

[AndrewT]

Originally posted by AndrewT
for Tc+55degC.................can drive a moderately reactive 8ohm speaker if you keep the heatsink below 45degC in worst case conditions..................... Do not let the heatsink warm up during either of these maximum power tests.

I'm interested in how warm things can be without being a danger to itself...

the answer is already there.

[AndrewT]

Originally posted by cuibono
the Vpp and Apk are for a single ideal channel, correct?

those results are the predictions of the actual model I entered into the modified version of Bensen's spreadsheet.
They are not "ideal". You will find that if you build to that spec the results will come out close to the predictions.

Yes, a single channel from that 1200VA transformer assuming regulation is 3.5%

[cuibono]

Thanks, yikes, and thanks! I wouldn't consider 45degC to be very hot...

[AndrewT]

heatsink temperature of 45degC is not very hot, it is not even hot.
The SOAR of your output devices and of the drivers, drops as temperature (Tc) goes up.

You are not testing the heatsink, you are testing the electronics which are not so easily predicted as a lump of copper or aluminium.

[AndrewT]

I should have added, that a 150W amplifier is likely to be sending an average of ~1.5W to the load during normal music listening.
If you want disco quality then increase your average music power to 15W, or more if you're really silly.

How warm will the heatsinks be when you have the input shorted to signal ground?
How much warmer will the sinks be when the average output power is 1.5W?

[cuibono]

Hmmm, I seem to be having a strange problem in some of my channels : I have a small test speaker hooked up to the amp. I play music through it. If I clip the driver moderately (which doesn't take much because it is a small 3", dc resistance of 6.5ohms), the cone locks up (I think) and the transistors start passing a lot of current (like 2A each, and develop a -0.4Vdc offset triangle wave on the output, probably due to the excess current draw?), and the music distorts badly. This persists if I turn off the signal. If I turn off the amp, it goes back to normal. I don't see any signs of oscillation.

What gives?

Also, the amps oscillate bad if I try and put in a 1kHz square wave from the oscilloscope (which should be about .3Vpp in, and only about 8.4V out). I guess this implies they are unstable?

Hmmm....

[cuibono]

Okay, the plot thickens.

I tested each channel with a resistive load. I have five boards right now: one with my original layout, the others with the newest layout, which was redone to make signal paths shorter (should be a good thing right?). Anyway, only my four new boards show the strange behavior of distorting and then passing lots of current above a specific input level. Below is a picture of a 100Hz sine wave distorting (with 5V/division).

Here is where things get strange. One of the four modules had test wires, about a foot long each, attached to the Nout and Pout pins of the LME chip for measuring the gate to gate voltage. This module had no distortion! Then I took off the wires and the problem came back! I then attached the wires to a problematic board, and the problem went away! Something is fishy here, because the app note (AN-1850) specifically states that there should be nothing attached to these pins for when doing performance testing because they are very sensitive to loading. Anyway, I hope SpittinLaama comes along, because I don't think this is a normal problem...

[cuibono]

Here is a drawing of the layout showing the traces and grid resistors. The wires were attached to the larger holes next to the small LME pin holes, next to the arrows.

Looking at the layout given in the app note, the grid resistors are right at the legs of the FETs, so there is basically no traces between them (these are shown in purple in my layout). I don't see any significant differences in trace lengths between my first and this most recent board layout.


Hmmm...