The main innovation re. the sapphire circuit is to replace the bias set resistors with diodes made out of the Vbe of transistors Q9 and Q10. This generates more voltage than is ideal, but can be handled by using largish values for the emitter resistors R13 and R14. Since this is a line stage buffer and not a headphone amplifier the output impedance of about 30 ohms and the limited output current swing are not critical flaws. It will drive 600 ohms at 0 dB with 0.001% THD. The whole circuit draws just 150 mW. The input impedance is a very high ~15 Mohms...
Posted 29th March 2016 at 05:10 AM byrjm (RJM Audio Blog)
Updated 18th April 2016 at 11:52 PM byrjm
Truth be told, for a self-biased jfet audio circuit like the CrystalFET the main reason we need to used matched jfets is to ensure that the signal gain is the same in both channels. The operating point of the amplifier stage (the voltages and currents) can be allowed to vary a little so long as the transconductance, g_m is the same, as this is directly proportional to the open loop voltage gain, A, as
A = g_m R_l (transconductance x load resistance)
Now, yes, ideally you would find two jfets with identical saturation current and pinch off voltages, ensuring not just the same gain but also the same operating point. In practice though you are usually binning parts that are close to each other based on some reference parameter like the pinch off voltage (V_gs0) that you hope closely correlates with the signal gain. This is not quite as good though as the calculating the actual transconductance of the particular device in the circuit it is to be used in. And since...
Posted 8th March 2016 at 12:29 PM byrjm (RJM Audio Blog)
Updated 6th May 2016 at 09:27 AM byrjm
with only two resistors, a 9 V battery, and a voltmeter...
The current-voltage relationship for a jfet device is approximately a quadratic expression defined by just two parameters, the saturation current, I_dss, and the pinch-off voltage, which I'll call V_gs0.
I = I_dss (1-V/V_gs0)^2
In principle, therefore, to characterize the device all we need is two data points (I1, V1) and (I2, V2) to solve the expression above for I_dss and V_gs0. We don't need to measure I_dss or V_gs0 directly.
All you need to do is connect the jfet device-under-test (DUT) as shown, and measure the voltages across two different source resistances. That's it. The excel worksheet computes the I_dss and V_gs0 values for you (or you can do it by hand, the formulas are provided.)
The math is a bit messy, but if you can solve a quadratic expression it's easy enough.
CrystalFET is a J113 jfet-based two-stage phono preamp, with passive equalization and on-board MOSFET-based shunt voltage regulator.
Black boards pictured are the original rev. 1.1a prototype, which I ended up using for mc operation. There was a connectivity error in the schematic used to make the boards, so the layout was redone as rev. 1.2a.
1.2a are for mc operation only, about 55-56 dB. I'm giving these away for $5 for one pair, see here. [only four sets left!] Rev. 1.2a is up and working. No abnormalities, near-perfect agreement with the LTSpice simulation.
Last, rev. 1.3c features switchable 35/56 dB gain for moving magnet and moving coil cartridges, and adds a jumper for the regulator "boost" feature. The basic circuit hasn't changed, just fixes and refinements of the concept. Pictured below.
Posted 20th February 2016 at 12:49 AM byrjm (RJM Audio Blog)
Updated 22nd February 2016 at 08:35 AM byrjm
A while back I did a series of blogs on voltage regulators. Back with a new entry today: The Crystal M, configured here for 40 V DC output and a 25 mA load.
The circuit is based on two p-channel MOSFETs, the top one is a constant current source, the bottom one a constant voltage source. As the load current changes, the voltage source adjusts its current to balance.
I trick, I discovered, to getting it to work nicely - the attached screencap shows it well-behaved while handling a full-swing output current pulse - is the source resistor R10. This resistance dials-down the current gain of the MOSFET, damping out the overshoot.
The ripple rejection is about 70 dB over the audio bandwidth. The output impedance is about 0.05 ohms over the same frequency...
Posted 18th February 2016 at 11:14 PM byrjm (RJM Audio Blog)
Updated 7th April 2016 at 06:58 AM byrjm
I've never put everything into a single LTSpice worksheet like this before: I find it fascinating. You can really pull apart a circuit to see what makes it tick, before solder ever hits the iron.
Power supply ripple, frequency response, gain, and crosstalk can be established. You can look at turn on and turn off transients, inrush currents, and conductance angle, and check peak currents in the filter capacitors. It's all there if you care to peek in and poke around.
I'm such a huge fan of LTSpice...
The only problem, really, is it is too perfect: all devices are perfectly matched, every part value is exact, and the temperature is always 25 C. Ground loops, wiring inductance, and thermal runaway do not exist. So no, of course there are no guarantees - but as a tool to get you 90% of the way there with the minimum of fuss and bother it is truly indispensable.
Actually I find the more experience you have the more useful LTSpice...
Posted 16th February 2016 at 01:27 PM byrjm (RJM Audio Blog)
Updated 16th February 2016 at 11:51 PM byrjm
There are various tricks, like parallel input devices and active current sources, that I have avoided here in the interests of simplicity. If you want to go down that road, you can get an idea where it leads, here. Instead, the circuit below is basically a JFET version of my old 6DJ8 amp, here. A single JFET was getting me nowhere in terms of output impedance - around 10kohms! - so I moved to a compound stage buffering each amplifier with a source follower.
Noise and distortion figures look okay. The gain is only 30 dB. A bit low. The main trick is the PSRR, which is awful. The two stage circuit actually amplifies the power supply noise onto the output. So considerable effort must be put into the power supply regulation and filtering. I note that this is pretty much par for the course with this circuit topology where resistors are used instead of current sources on the JFET drains.
The circuit below leaves out the usual RC filter inserted between the power supply...
Posted 2nd February 2016 at 07:11 AM byrjm (RJM Audio Blog)
Updated 24th February 2016 at 01:02 AM byrjm
The discussion thread at the headphone forum is here, but I wanted to throw out the problem to the general blog-reading community here at diyaudio to see if anyone can nail this.
The earthed chassis (light blue) must connect to the circuit common i.e. "ground" (pale green). I do not know where the best place on the circuit ground is to tie that connection.
(COM and GND are completely equivalent pads on the circuit board, while IN- and OUT- also pads on the board but physically further away on the ground plane.)
Answer: as long as it connects at one point only, or the same point of both channels, it doesn't seem to matter at all. I have it connected at the ground tab of the headphone jack and that seems to be as good as anywhere.
The noise was in fact magnetic interference emanating from the transformers. Grounding layout changes / electrostatic...
I've been meaning to get around to updating this by folding in the improvements to the diamond buffer stage made during development of the Sapphire 3 headphone amplifier. Here is the first look of the bboard v2 under LTSpice.
I've gone back to simple emitter resistors on the input, running under much lower current to keep the input impedance high. The output is simplified to a basic Sziklai compound transistor pair with the bulk of the bias current running in the second transistor.
In terms of distortion, for line level output level, CCS loaded input has no advantage. I'll have to double-check PSRR and a few other things before signing off on this version though.