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Old 12th March 2004, 01:04 PM   #11
borges is offline borges  Norway
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Join Date: Dec 2003
Location: Oslo, Norway
Quote:
Originally posted by Christer
This thread may be of some interest:
Optimum Decoupling of Digital ICs
Thanks Christer, what a nice little talk on grounding!

The whole reason I'm asking is that all those capacitors do take up quite a bit of board area.

The easy cases are decoupling caps that fit power pins at chip corners. Then I put the ceramics right next to the power pin and let ground be a large plane under the chip. I want as few holes in this plane as possible so that return current doesn't have to go around obstacles.

But I'd like to cut down on the number of caps on the pad sides of chips. Take PCM1704 and PCM1794 which need a little forest of capacitors each. And the more of them I have to put in parallel, the larger my ground-plane holes (to route between SMD caps and power pins) and the larger my series inductance between cap and power pin. Caps on the pad sides don't have the easy end-of-chip immediate access to the common power plane.

I've put a lot of care into my layout, so don't come here and tell me this is only an RF problem

Wouldn't it be nice with something like an SMD os-con with a ceramic 0805 embedded in the black base?

Greetings,

BÝrge
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