Would it be too much if I asked for the stuffing diagram (like one in R3 Paradise board) for the Calvin Buffer ?
Although the circuit is not very complicated, it will be very helpful, especially when placing J107/PF5102.
Either way, thanks again for the beautiful board.
Reconsidered this after fixing the riaa and further listening - it's a significant improvement
Reconsidered this after fixing the riaa and further listening - it's a significant improvement
As I told you, well done.
Take care
Werner
Calvin buffer idle current question
It seems the choice of fets in my build produce a bias current of just 13mA for the outputs. Calvin's original sims were all based on 40-45mA. Not sure if this is audible or worth fixing. It will probably mean changing both load resistors for the cascode in order to preserve the CCS modulation, right?
It seems the choice of fets in my build produce a bias current of just 13mA for the outputs. Calvin's original sims were all based on 40-45mA. Not sure if this is audible or worth fixing. It will probably mean changing both load resistors for the cascode in order to preserve the CCS modulation, right?
The 22r resistors feeding the BJTs need to be reduced.
I worked down to 10r to get between 23mA and 25mA passing the BJTs. Add on the jFET current (6 to 7mA) to get close to the 30mA quiescent current. The Vdrop of the 2r2 should be around 66mV indicating 30mA.
You could adjust the 50r (in series with the 100r) upwards to increase the quiescent current. But that may affect the ratio affecting the distortion cancellation via that 1M resistor. I kept 51r here.
I worked down to 10r to get between 23mA and 25mA passing the BJTs. Add on the jFET current (6 to 7mA) to get close to the 30mA quiescent current. The Vdrop of the 2r2 should be around 66mV indicating 30mA.
You could adjust the 50r (in series with the 100r) upwards to increase the quiescent current. But that may affect the ratio affecting the distortion cancellation via that 1M resistor. I kept 51r here.
Hi,
the 51R (R2) in the upper part seem too low.
The sims base on a summed resistance of R1+R2 of 180R.
So 75R-82R should suit R2 better.
In the lower part the 180R stem from the 220R R8a and the paralleled Poti R8b.
If R1+R2 is low, either R8a needs to be lowered a bit or the Poti setting needs to be lower. This of course means a higher current through the Poti, which should be kept below ~1mA.
Then the 2R2 resistors R6 und R11 define the idle current through the whole circuit, while R5 and R7 define how much of the total idle current runs through the JFETs and how much through the Bipolar.
The 22R seem too high, as more curent is routed through the JFETs and less through the Bipolar.
I´d suggest to try the original values from the schematic.
4mA-6mA for the JFETs is the target range and this is more than sufficient and will heat them up already.
With R1+R2=180R, 4-6mA means a voltage drop of 720mV-1.08V over R1+R2.
The current through the bipolars calculates to I(r5)=V(r5)/R5, resp. I(r7)=V(r7)/R7.
30mA will generate ~200mV over 6R8.
Similarly the voltage drop over R6 and R11 tells us how much total idle current flows.
jauu
Calvin
the 51R (R2) in the upper part seem too low.
The sims base on a summed resistance of R1+R2 of 180R.
So 75R-82R should suit R2 better.
In the lower part the 180R stem from the 220R R8a and the paralleled Poti R8b.
If R1+R2 is low, either R8a needs to be lowered a bit or the Poti setting needs to be lower. This of course means a higher current through the Poti, which should be kept below ~1mA.
Then the 2R2 resistors R6 und R11 define the idle current through the whole circuit, while R5 and R7 define how much of the total idle current runs through the JFETs and how much through the Bipolar.
The 22R seem too high, as more curent is routed through the JFETs and less through the Bipolar.
I´d suggest to try the original values from the schematic.
4mA-6mA for the JFETs is the target range and this is more than sufficient and will heat them up already.
With R1+R2=180R, 4-6mA means a voltage drop of 720mV-1.08V over R1+R2.
The current through the bipolars calculates to I(r5)=V(r5)/R5, resp. I(r7)=V(r7)/R7.
30mA will generate ~200mV over 6R8.
Similarly the voltage drop over R6 and R11 tells us how much total idle current flows.
jauu
Calvin
You are both right. I was simulating with different transistors (and transistor models, sigh ) and had to readjust the resistors to get the optimum. The values given in the BOM should work fine for the combination of PF5102 / J107 / 2SA1381, towards a total supply current of 30mA as stated by AndrewT, with the output stage current mostly dominated by the emitter resistors (R5 and R7). These are given in the schematic with 6.8 Ohm, on the PCB with 22 Ohm - shame on me..... I will publish an updated assembly guide quickly.
Hi,
The ratio of R1 to R2 may vary, depending on the load inpedance.
The current swings in the upper and lower parts are not necessarily symmetrical with a certain fixed ratio.
So my recommendation was to tune the ratio for symmetrical currents into the lowest load impedance connected to the output.
Lower load impedances require more modulation, hence a larger value of R1.
The values I chose base on a minimum load of 300R, resp. 600R balanced.
If one wants to make the grade of modulation variable, You could replace R1+R2 by a single 200R resistor, paralleled with a 2k poti. The wiper of the poti is then routed to the cap at the gate of the lower JFET. This keeps the combined resistance of the resistor+poti constant and allows for varying grades of modulation.
You can then first tune the output offset with poti R8a/R8b and second tune the current swings on symmetry with the new poti.
jauu
Calvin
The ratio of R1 to R2 may vary, depending on the load inpedance.
The current swings in the upper and lower parts are not necessarily symmetrical with a certain fixed ratio.
So my recommendation was to tune the ratio for symmetrical currents into the lowest load impedance connected to the output.
Lower load impedances require more modulation, hence a larger value of R1.
The values I chose base on a minimum load of 300R, resp. 600R balanced.
If one wants to make the grade of modulation variable, You could replace R1+R2 by a single 200R resistor, paralleled with a 2k poti. The wiper of the poti is then routed to the cap at the gate of the lower JFET. This keeps the combined resistance of the resistor+poti constant and allows for varying grades of modulation.
You can then first tune the output offset with poti R8a/R8b and second tune the current swings on symmetry with the new poti.
jauu
Calvin
Oh, cool. So instead of building it once we can build it twice. Any further radical updates anticipated?
Well, when I designed the PCB I think it was Joachim who suggested to put two trimpots, as Calvin is suggesting too, and it makes a lot of sense.
But then I thought proper adjustment will only be possible for folks with access to a distortion analyzer with reasonable quality, and those guys are capable of soldering in a trimpot themselves and replacing it with fixed resistors when done.
However, this does not optimize it for different load impedances so that would have to be defined before the test. But this problem is of rather academic nature, if I may say so, since we are talking differences from 0.01% ... 0.005% which is far far below cartridge / vinyl distortion levels anyway. I am not saying it does not matter, but when you are getting so far down to the details to finetune, more effort on the test&measurement tools will have to be spent. Or can this adjustment be heard?
But then I thought proper adjustment will only be possible for folks with access to a distortion analyzer with reasonable quality, and those guys are capable of soldering in a trimpot themselves and replacing it with fixed resistors when done.
However, this does not optimize it for different load impedances so that would have to be defined before the test. But this problem is of rather academic nature, if I may say so, since we are talking differences from 0.01% ... 0.005% which is far far below cartridge / vinyl distortion levels anyway. I am not saying it does not matter, but when you are getting so far down to the details to finetune, more effort on the test&measurement tools will have to be spent. Or can this adjustment be heard?