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Old 15th October 2010, 04:17 AM   #41
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Ok, let's start with a simple common emitter amplifier using the 2SK170 jfet from Toshiba. This circuit is configured for first stage duty. The performance is surprisingly good for such a simple circuit, at least for the low levels encountered for first-stage amplification in an RIAA preamp. As mentioned before, I juggled values to get a first stage gain of close to 40X. The 22k load at the output is due to the initial resistor of the RIAA passive equalization network, which uses 0.1uF for the first break point, 34nF for the second, and resistors scaled accordingly.A resistor value of 22k approximates the load seen by the first stage. The excitation set for the first stage is 2mV to approximate the input from a MM cartridge.

I used PSpice for the simulation. Rel Tol is set at 0.0001, and the step size is set to 1ns. The schematic here shows the circuit and bias values. A PN4391 cascode FET is used so that the cartridge does not see the reverse transfer capacitance of the 2SK170 input jfet. This (the cascode) is pretty much a must for typical MM cartridges, which really care about the loading capacitance. It all adds up, cables, fet input capacitance, and fet reverse transfer capacitance X gain. The cascode pretty much takes care of the last item, but the other two are there in full effect.

Without the cascode, this is the topology used for the first stage of the "Pacific" ultrasimple jfet phono stage, refined by Salas in his popular "Simplistic" thread.
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Last edited by wrenchone; 15th October 2010 at 04:32 AM.
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Old 15th October 2010, 04:22 AM   #42
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This post shows the simulated THD and harmonic spectrum of the stage noted above. It's pretty good for such a simple circuit. The 2nd harmonic totally dominates, and the higher harmonics are way down. Not bad at all - this is why I chose a variation on this circuit for the input stage shown in this thread. Gain is a little shy of 40X due to the direct loading from the 22k.
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Old 15th October 2010, 08:26 PM   #43
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Ok, so you've seen a design for a simple common source amplifer for the first stage of a phno preamp. Performance looks pretty good, but what else do you need to know? If you're going to tack an RIAA passive equalization network to the output of this amplifier stage, you'll need to know the output impedance of this stage, because it will add to the value of the first resistor of the equalization network, and you need to adjust that value accordingly. The output impedance of a common source jfet stage is the parallel combination of the output impedance of the jfet with the drain load resistor. Cascoding the input jfet increases its output impedance fairly dramatically. For a first approximation , you can assume that the output impedance is simply the value of the load resistor, and adjust the value of the equalization network input resistor by reducing its value.

What if you didn't want to worry about the output impedance of the first stage at all? What can you do? One solution would be to add a buffer. The next circuit shuws just that.
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Old 15th October 2010, 08:36 PM   #44
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The circuit shown here is the jfet common source stage previously shown, with the addition of a direct coupled current source loaded source follower. The bottom jfet off the follower stage is configured so that it acts like a current sink to bias the top stage. This combination has drastically lower distortion that a source follower using resistive loading. The output impedance of this stage is very low (~50 ohms). Using fets with higher transconductance than the PN4393 (say, a pair of of 2SK170) would yield even lower impedance, but this is pretty good performance from a pair of 35 cent jfets, and allows one to pretty much ignore the impedance of the preceeding common source stage when choosing the first resistor for your passive RIAA equalization network. Is there a penalty? Well, read on.
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Old 15th October 2010, 08:57 PM   #45
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In the previous post, I added a current source loaded source follower stage to the previously described cascoded common source amplifier. This stage isolates the common source stage from the loading of the RIAA equalization network and drives it with a low impedance. Due to the reduction in loading, the gain of the stage is now slightly above 40X, whereas the unbuffered stage had a gain sliightly less than 40X. Use of the buffer to isolate the input stage is appealing from an engineering standpoint, though it was pointed out that one can adjust the first resistor of the RIAA network to compensate for the output impedance of an unbuffered common source amplifier. A simpler input stage is aesthically appealing to some, and some will want to keep the number of stages/parts in a preamp to the minimum.

Is there an obvious drawback to adding a buffer? That's not too clear, as the simulation results for THD and harmonic distribution indicate that the buffer doesn't do much of anything to the signal from the preceeding common source stage. Part of the reason for this is likely due to the low signal excursion in this stage.

However, THD isn't the whole story. In order to determine an effect in sonics from the addition of the buffer, one would need to compare the burffered and unbuffered circuits carefully tweaked so that their frequency response is identical, as any difference in equalization will likely mask the sonic differences. I haven't done that yet - maybe you can try it and report back here...
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Old 16th October 2010, 05:52 AM   #46
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I'm going to keep for the time being the common source stage with cascode and buffer as my 40X input stage. There are somewhat more complex candidates with lower THD that could be considered, but let's not overly complicate things at this point - the common source stage with or without buffer is a good use for the ever-scarcer 2SK170.
The actual stage with a lot of distortion issues is the 30X output stage that has to handle line level signals. We'll look at the simple common cathode topology as a line-level output stage before examining other possibilities, and in the process, discover why I considered other circuit topologies for this duty.
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Old 16th October 2010, 08:01 AM   #47
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Hi,

as You wrote THD isnīt the whole story, especially as the THD-sims can be very off of the practical values. Just yesterday I had to learn again, that sim and real world differed by app 50dB in THD!! I only use the THD-sim to get an idea about the spectrum of distortions and to see a rough tendency about the quantity.
Basically Iīd opt for the simpler circuit, because in my experience lower parts count of active devices resulted in better sound for my ears in most -not all- cases. But the CCS-loaded sourcefollower as buffer is as sonically transparent as one could wish for. Even on my system, which is a extremely sensitive evaluation tool, I canīt really tell any obvious noticable difference between buffered and non-buffered circuits.
In the case here, Iīd probabely choose the buffered version, not only because of keeping the gain stageīs impedance out of the calculations, but also to be able to drive the following filterīs caps clean and fast. The gain stage might be short of current capability, while the buffer could drive more current from a lower output impedance into the RIAA-network.

jauu
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Old 16th October 2010, 08:40 AM   #48
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At low level, I'd tend to agree. I like the engineer's viewpoint that the passive RIAA filter wants a low impedance driving it for minimum error, also, a high impedance at the other end.
At least for higher level signals, measurements made with an Audio Precision analyzer at work are in rough agreement with the simulation results for simple circuits like this. It's a tough measurement, as the setup has to be well-shielded and just right, seeing as there can be extra noise from the computer hooked up to the analyzer, as well as the surrounding racket. I'm in a lab environment where people are testing switching power supplies, after all...

It would be a good thing to put together a die-cast Bud box setup with standard ins and outs to make measurement easier. Still, there's the setup for the AP analyzer, not the most user-friendly instrument in the world, especially as you have to deal with what the previous user has done to it.

Last edited by wrenchone; 16th October 2010 at 08:49 AM. Reason: sp
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Old 17th October 2010, 10:46 PM   #49
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Ok, I've settled on a 40X common source amplifier with buffer for the first stage of the preamp, and now I have to look at the 30X line-level output stage that gets tacked on after the equalization network. I'm going to start with the same sort of topology as I've chosen for the input stage just to show what happens, then move on to some alternate approaches.

The schematic shown here is the same cascoded common source amp using the 2SK170 as has been discussed previously. I kept the cascode to minimize the amount of non-linear capacitance presented by the fet to the RIAA network (RIAA curve accuracy). The input drive is adjusted for an output of ~1V, a hefty but realistic level.
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Old 17th October 2010, 10:58 PM   #50
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You will note in the previous schematic that I've tweaked the resistor values not only for 30X gain, but to center the drain voltage at ~1/2 VCC for maximum symmetric voltage swing. The THD and harmonic distribution simulation for this circuit is shown below. Though the harmonic distribution is still very clean and totally dominated by the second harmonic, the THD is up by a factor of ~10X. Still, 0.2 to 0.3% THD is not bad for a simple circuit with no global feedback (especially as it's the very benign 2nd harmonic), and driving a 50k pot, no less. Many would be tempted to "declare victory and go home". Many have.

Before moving on to other output stage options, I want to look at the effects of a buffer on this circuit, operating at high amplitude. If one wants to use this kind of circuit in a stand-alone preamp to drive a cable with perhaps lower/unknown impedance peripherals at the other end, a buffer is probably a wise choice for interfacing to the cold, cruel world.
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