Salas,
tested my sk117gr jfets with 9V and 1kR in the drain and they came in much higer thatn expected. In the 7mA range. I am wondering if it is a function of low Vds. Are these usable by dropping the 6.8K resistor or exchanging for lower value? Calculator suggest that 2.2K can be substituted and I should be OK. I figured 70mA load current since I will be running both channels of one shunt. Just want to make sure before firing up.
tested my sk117gr jfets with 9V and 1kR in the drain and they came in much higer thatn expected. In the 7mA range. I am wondering if it is a function of low Vds. Are these usable by dropping the 6.8K resistor or exchanging for lower value? Calculator suggest that 2.2K can be substituted and I should be OK. I figured 70mA load current since I will be running both channels of one shunt. Just want to make sure before firing up.
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Didn't really mess with this at all since breaking leg of one 9530 in the SSLV1.1. Ordered some more but did not get here. Went ahead and finished the Salas reg. Current setting resistos is parallel 120 and 15, for 13.3R. Shunt current of around 250mA. Probablly low for 2 channels, but don't really want to push sinks any more. Got 36V across output, loaded with 960R. Will trim to boards when attached. Tomorrow. I am tired and have to work tommorrow morning in the cold. Bla! The "plan" is to listen tomorrow or Sunday.
FYI,
This is the folded version I am building.
http://www.diyaudio.com/forums/analogue-source/129126-simplistic-njfet-riaa-839.html#post3221512
FYI,
This is the folded version I am building.
http://www.diyaudio.com/forums/analogue-source/129126-simplistic-njfet-riaa-839.html#post3221512
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A single warm enough SSLV1.1 is enough to get you 90% there for the folded, for now. If it will be to your liking or not it will show even in a less than all out double mono initial test config. See to have no hum and a tuned Riaa for starters. In about 48 hours it will mellow out a wee bit also after the lytics will almost shape up.
Replaced Vref with 470uF SilmicII, since its a RIAA. It has been run in for a while, so no worried there. The KG in the PSU are new. Caddock is current setting resistor. This is what i liked in the DCB1. Seemed bigger difference in DCB1 was higher current vs fancier parts, bu tit is hard to resist in DIY.
Yup. Thanks for looking out. VGeorge caught Vref cap mistake. We shall see later today.
I have something just for fun hopping to get good comments:
After building a rig to measure 2SK170BL fet Idss and Vp, I found that Vp and Idss are linearly related so I constructed a table ranging from 6mA to 10.5mA using a linear regression method.
Then I analysed all my builds and designed a calculator enabling to determine Rd, Rs and Gain depending on Idss, Vdd and Vdsq.
If you know and want to use a specific Rd, there is an option too.
Severall methods for calculating Gain are presented.... feel free to pick the one you like most
This calculator is speciic for the Simplistic gain stages and may not be good for other purposes because it is based on factors used here.
You can even use it for the classic cascoded first stage because Rd is much lower than this stage output impedance so this cascode does not give more gain but much more bandwith and miller reduction.
After building a rig to measure 2SK170BL fet Idss and Vp, I found that Vp and Idss are linearly related so I constructed a table ranging from 6mA to 10.5mA using a linear regression method.
Then I analysed all my builds and designed a calculator enabling to determine Rd, Rs and Gain depending on Idss, Vdd and Vdsq.
If you know and want to use a specific Rd, there is an option too.
Severall methods for calculating Gain are presented.... feel free to pick the one you like most
This calculator is speciic for the Simplistic gain stages and may not be good for other purposes because it is based on factors used here.
You can even use it for the classic cascoded first stage because Rd is much lower than this stage output impedance so this cascode does not give more gain but much more bandwith and miller reduction.
Thank you
It was really mented as a tool for experimentation and comprehension... as is it is no substitute for a simulator and I really believe we should always breadboard before building anything.
Anyway, The scale factor of 2 in gain Equations is nominal. According to the National Semiconductor FET Handbook (1977), that factor can range from about 1.1 to 2.5 but is typically near 2, so I can easily adjust it based on your input.
Can you give me some gain figures ?
48dB build 28V output stage Rd 4k7 Vd = 11v and Rs 47r
48dB 28V input stage Rd 3k3 Vd = 14v and Rs 33r
57dB 37V output stage Rd 6k3 Vd = 10v and Rs 27r
I believe these will beenough to find a good compromise for the gain equation.
It was really mented as a tool for experimentation and comprehension... as is it is no substitute for a simulator and I really believe we should always breadboard before building anything.
Anyway, The scale factor of 2 in gain Equations is nominal. According to the National Semiconductor FET Handbook (1977), that factor can range from about 1.1 to 2.5 but is typically near 2, so I can easily adjust it based on your input.
Can you give me some gain figures ?
48dB build 28V output stage Rd 4k7 Vd = 11v and Rs 47r
48dB 28V input stage Rd 3k3 Vd = 14v and Rs 33r
57dB 37V output stage Rd 6k3 Vd = 10v and Rs 27r
I believe these will beenough to find a good compromise for the gain equation.