Simplistic NJFET RIAA

[Salas]

Originally Posted by vgeorge

Found some 2SK369 on ebay. Do you think they are fakes?

Originally Posted by Bksabath

I got same 2SK369 on their way hopefully they be the real thing and build as on post 7881

Guys when you are going to measure those for IDSS take caution. In case they will be genuine their high Yfs and capacitance can set them off and trick out the measurement setup. I have a few in my stash from years ago which have the right looks, bought in Japan. Have used them before in circuits. I was fiddling with them again to sort out a quad for the new experiment we are up to. Rat hint was when I saw 10-20% play between DMMs in series mA mode for same sample. I decided to investigate. First I looked if it was about burden voltage due to differences in the internal shunt resistor of the DMMs when in mA mode. One has 2.5R other has 5R and another 10R. So I thought it may be influential with those JFETs initially. But it was not that. I set up a 3.3K dummy at 10V PSU and put them in series. All three DMMs were spot on 3mA and very close between them in the last digits. Then I used a 10 Ohm in series with the JFET, set the DMMs in mV parallel mode to see what happens when using the voltage drop method that gets them out of the way. Worse! up to -20/+40% incompatible readings. But I spotted something. The worse the deviation, the more the PSU was indicating a few hundred mV change on its original 10V setting. That's it, oscillation due to all this cabling and DMM internals. Only one DMM would not bother in series mode, but it would bother the most in parallel mode. Parallel Rdrop method indicating in mV was the jumpier anyway. So take caution, make the breadboarding tight and have a DMM in voltage mode parallel to the PSU or battery. Watch that the power source does not jump its voltage reading in the hundreds of mV when you close circuit measuring IDSS. It did go tricky with battery too by the way. Now it may be my cables and set-up or not, but watch out for it creeping in because the parts are going to bias differently in circuit then and they may shut down the input stage for amplifying even, since the current is allocated after a resistor CCS to a certain share between branches. Those parts are not useful for many other uses and are quirky so don't invest in any number than a few, especially in the face of getting the fakes risk. If genuine they bunch well so not many drop outs anyway. What you see in the pic is a 10mA one when all things calm but misbehaving at that shot setting. I tried on K170BL all the above methods, no problems. So the 369s are quirkier is the difference.

[vgeorge]

Thanks for the advise Salas!

[Salas]

Will have to come again to the island and evaluate in your horn speakers the phono twists at a point in fall in case they will be promising. You won Lynn Olson's blessings I saw. Nice.

[vgeorge]

You are welcome anytime!
Your help with my speakers was invaluable.
Don' t forget the new TSSA amp is on the line too!

[RCruz]

Originally Posted by Salas

Ok, here it is for classic 4XK170BL. You may relax the matching for the quads since they are degenerated enough to share current at ~0.75*IDSS and the total transconductance (~130mS) will be steady for 7.5-9mA samples at shared ID. But make sure that the sum total of the quads IDSS between channels is nearly the same. So the folded cascodes will be sparing the same drive current to R16 and same gain. No loop feedback here to match the gain if not thorough with JFETs picking in both stages. It should present ~15 Ohm input equivalent noise resistance, not bad. And some better input headroom, adequate for normal MC also. Pick a ~5mA BF245A for Q8 and circa 15mA BF245C for Q5.

Hi Salas
Can we use J310 instead of BF245C for Q5 ?

What are the main differences between them ?

[Salas]

J310 around 40mA Fairchild gives me twice as much Vgs (=Vds across 8mA K170 under it in full IDSS cascode CCS test) compared to 15mA BF245C Fairchild. So take care not to see more than 7.9V across your K170 when you will apply with your Rs. After that point gate leakage jumps. There are linearity and noise differences between 245 & 310 which do not impose them selves in this config enough.

[Salas]

Originally Posted by vgeorge

Thanks for the advise Salas!

P.S. A tiny lead jumper between G & S next to them instead of breadboard pin wire keeps 369s less trigger happy during Idss sorting.

[vgeorge]

Usually tie them together with alligator clips. Will check when I get my stash and report.

[Salas]

That's short path, its good for less inductance between gs, only it delays you exchanging them and there is a risk for accidental shorts in series mode blowing some mA range DMM fuse.

[vgeorge]

I already ordered a breadboard I didn' t have for testing.
Measured lots of fets so far no fuse blown on DMM. But I' ll keep that in mind.
Of course it' s not the faster method.