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Old 22nd November 2011, 03:09 PM   #7001
RCruz is offline RCruz  Switzerland
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Another way to solve this turn on reluctance is placing a small cap (15pF) between Q3 collector and GND, but this reduces PSRR. It works but the larger the cap, the worse it sounds.
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Old 22nd November 2011, 03:20 PM   #7002
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Thank you so much Merlin

Do you have resistors under the board ?
Possibly the gate stoppers resistors directly soldered to mosfets.
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Old 22nd November 2011, 03:30 PM   #7003
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Originally Posted by kstlfido View Post
I Salas (et al)-

I wired up my 1.2R shunt and fed it power. Loaded output with 1kohm, as you instructed.

Results-

Input- 44.0vdc

Output-
Varied from 37vdc to 42vdc in 1 v steps.
Always consumed 188.3 to 188.6mA (after a little settling time).

IRFP9240 and load R were warm to the touch. IRF9610 was lukewarm.

At 43.5v, current starts to drop.
At 44.0v, 113.9mA
At 44.6v, current bottoms out at 56.9mA.

Scope observations-

Tek 20 mHz scope. I am limited as I only have 100:1 probe, so max sensitivity is only 500mA/division.

No sign of oscillations at the output, across load resistor at any frequency.

So, is 500mA/div sensitive enough?

I'm traveling for the US holiday this week, will be back next week to continue working on the RIAA. Pics of shunt so far, below. Temporary power wiring and sinks.

Cheers! -Kent
Hi Kent

Your regulator build looks like its in healthy order by your results. In wrongly laid out oscillating builds I have seen 70-160mV P-P circa 5MHz crooked sine waves so you would have spotted such phenomena even with your available probe I guess, albeit appearing squashed on your oscilloscope screen. As for the CCS current start dropping when Vo very near to VDC in, I had written in the regs thread once that you can go really near Vin for Vo especially in BJT assisted CCS ones like yours, but its not best practice to adopt. Keep drop over reg 5V at least (watch CCS sink temp), so you ensure steady performance and mains variations immunity. 7-10V is even more secure and robust. Congrats, you hit it with just one shot.
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Old 22nd November 2011, 04:34 PM   #7004
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Another way to solve this turn on reluctance is placing a small cap (15pF) between Q3 collector and GND, but this reduces PSRR. It works but the larger the cap, the worse it sounds.
You can connect R6 directly to DCin instead to Vout line. That will change reference for the cascode bases bias to same loop as the CCS fet and its bjt controller. Its a ''dirtier'' practice, but you may try see if it solves your problem in the stubborn build with some subjective loss or without.
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Old 22nd November 2011, 04:57 PM   #7005
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I just solved the issue in my stubborn V12R by moving R3 nearer to Q1 and away from Q2

It might have something to do with layout in my case.

Anyway, would you please comment on Andrew´s idea ?

PS: It is good to know that I can reference the cascode directly to Vin but as you say it is a dirtier solution so I will save it for last (maybe the small cap is a better compromise)
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Last edited by RCruz; 22nd November 2011 at 05:00 PM.
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Old 22nd November 2011, 05:13 PM   #7006
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Its also about how much VDS will be across the Mosfet, with small drop its capacitances are high. Sample to sample differences, physical location of gate stopper, inductance of layout and particular resistor, etc. Can't comment on Andrew's idea because I haven't tried it in the first place, but it sounds logical. You would not have such start up things if you will use the Jfet cascode CCS tail for builds of lower Vo circuits. Those are self biasing. K170BL base Jfet and BF245C on top etc.
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Old 22nd November 2011, 05:17 PM   #7007
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Yes it seems logical... during power on, the cascode would be referenced to raw Vin, but when the shunt starts to operate, the cascode would be referenced to regulated Vout.

Would you care to sim it ?
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Old 22nd November 2011, 05:23 PM   #7008
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What, the RZ across DS of CCS Mosfet? Will not change reference, will just give it a kick. Will sim at a point for you alright.
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Old 22nd November 2011, 05:32 PM   #7009
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Thank you so much... IMO a simple kick start would solve all my build issues.

It seems I am the only one experiencing this stubbornness, so I guess I owe it to badly chosen components or imperfect layout, so if you do not want to clutter this thread with a one off case, please send me an e-mail with your conclusions.
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Old 22nd November 2011, 07:13 PM   #7010
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Thank you Salas and AndrewT for the feedback.

My intention is to supply the shunt with 45v, output 40v max. The readings were just to show where it runs out.

I'll pick up a new probe soon. But it appears stable, so my I guess my tight layout is OK. Will continue building when I return.

Cheers- Kent
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