Here's a discrete preamp that can produce vanishingly low distortion (-120db) into a 2.2kOhm or larger load, with a 3V p-p output signal.
Why not opamps? Because this is transistor golf.
Each gain stage in the preamp uses only 6 bipolars.
The first attached image is the core gain stage. The second image builds upon it into a full preamp circuit with two sets of baxandall tone controls at different cutoffs.
Why dual tone controls? If I build this, it'll be a drop-in replacement for the preamp board in a Pioneer SA-9500 mk2 which uses this dual tone setup. Values for the tone circuit are unchanged from the original Pioneer design.
Constructive criticism welcome. I'm still learning.
One nice thing about this circuit: tolerances don't matter. There are no betas or Vbe drops or resistors to match. Nothing needs to be thermally coupled.
Edit: Post 32 has final, as-built schematics. The images here were the original concept. (It turns out we can't edit attachments to the #1 post...)
Why not opamps? Because this is transistor golf.
Each gain stage in the preamp uses only 6 bipolars.The first attached image is the core gain stage. The second image builds upon it into a full preamp circuit with two sets of baxandall tone controls at different cutoffs.
Why dual tone controls? If I build this, it'll be a drop-in replacement for the preamp board in a Pioneer SA-9500 mk2 which uses this dual tone setup. Values for the tone circuit are unchanged from the original Pioneer design.
Constructive criticism welcome. I'm still learning.
One nice thing about this circuit: tolerances don't matter. There are no betas or Vbe drops or resistors to match. Nothing needs to be thermally coupled.
Edit: Post 32 has final, as-built schematics. The images here were the original concept. (It turns out we can't edit attachments to the #1 post...)
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Hi Dug!
Q5 is a nearly constant current source. Q4 swings the output voltage up and down; Q3 is a buffer so that the input stage doesn't have to drive the junction capacitance of Q4. Together Q3 and Q4 work just like the VAS in a power amplifier, and Q5 works like an active VAS load.
You're right about the DC output level. Like an opamp, the core gain block doesn't control it at all, it relies on an external feedback network to close the loop and set output level at DC. It also relies on the feedback network to supply a bit of bias current into the negative input. That's what R111 through R114 are doing in the tone control stages, they dribble just enough current from the output back to the negative input to bias the negative input correctly. The value of these resistors sets the output DC voltage also. I don't love that the output voltage ends up being a function of transistor beta so I may revise that biasing before this circuit is final.
ps. It's not final yet
Q5 is a nearly constant current source. Q4 swings the output voltage up and down; Q3 is a buffer so that the input stage doesn't have to drive the junction capacitance of Q4. Together Q3 and Q4 work just like the VAS in a power amplifier, and Q5 works like an active VAS load.
You're right about the DC output level. Like an opamp, the core gain block doesn't control it at all, it relies on an external feedback network to close the loop and set output level at DC. It also relies on the feedback network to supply a bit of bias current into the negative input. That's what R111 through R114 are doing in the tone control stages, they dribble just enough current from the output back to the negative input to bias the negative input correctly. The value of these resistors sets the output DC voltage also. I don't love that the output voltage ends up being a function of transistor beta so I may revise that biasing before this circuit is final.
ps. It's not final yet
This revised gain stage works better at the input of the preamp, it copes much better with a source impedance. The volume pot preceding it can present up to 25Kohm source impedance so that's a requirement.
Previous FFTs were taken with only 220 ohms of input impedance. When I raised that to 22Kohm, distortion performance fell apart, around -90db for the input stage. Yechh.
The new gain stage adds a cascode so that the input transistor never sees a voltage swing at its collector. That gets us back to -118db distortion performance when driving a 1kOhm load. Still only 6 transistors!
I'm keeping the original gain stage for the tone control sections. It requires only microamps of bias on the negative pin, which was needed to get the biasing right with the tone stages. The input stage doesn't need that, it can happily drive the 800uA of bias that the new gain stage needs on its negative input.
Previous FFTs were taken with only 220 ohms of input impedance. When I raised that to 22Kohm, distortion performance fell apart, around -90db for the input stage. Yechh.
The new gain stage adds a cascode so that the input transistor never sees a voltage swing at its collector. That gets us back to -118db distortion performance when driving a 1kOhm load. Still only 6 transistors!
I'm keeping the original gain stage for the tone control sections. It requires only microamps of bias on the negative pin, which was needed to get the biasing right with the tone stages. The input stage doesn't need that, it can happily drive the 800uA of bias that the new gain stage needs on its negative input.
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If you evaluate these gain stages as op-amps, they're not very good: PSRR is low, input offset is nowhere near 0V, input bias current is worse than most monolithic op-amps, and the output current is limited. I haven't qualified the CMRR or OLG or other parameters that you'd normally specify in an opamp. These gain stages rely on split supplies and also a ground, so they couldn't fit in a standard op-amp pinout.
Those issues could be fixed with more elements. We can have excellent distortion performance, a short bill-of-materials, or op-amp levels of generality -- choose any two.
That's why I call it a preamp, I'm just not going for op-amp generality, not trying to optimize every parameter people evaluate opamps with. These gain stages and their host circuit are designed together. Like any good relationship, they overlook each others' weak points. Or maybe it's a co-dependent relationship?
Those issues could be fixed with more elements. We can have excellent distortion performance, a short bill-of-materials, or op-amp levels of generality -- choose any two.
That's why I call it a preamp, I'm just not going for op-amp generality, not trying to optimize every parameter people evaluate opamps with. These gain stages and their host circuit are designed together. Like any good relationship, they overlook each others' weak points. Or maybe it's a co-dependent relationship?
What mechanism would cause these circuits to behave far worse than the sim?
My understanding is that Spice may model Early effect and junction capacitance in BJTs as more linear than reality.
That said, with the cascode added in post #5, neither Early effect nor CJC should come into play for the Q2 input transistor. Q3 sees only small AC voltages and currents and shouldn't see either effect. Q4 will see a lot of Early effect and CJC current, which is mitigated by Q3 whose only purpose is to drive Q4's CJC so the input stage doesn't have to. Spice shows this very well if you remove Q3: distortion gets much worse.
Similarly, the tone control gain stage from post #2 has only tiny AC voltages at its inputs, so Early effect and CJC effects in the IPS should be negligible. The rest of the analysis is as before.
What am I missing?
I could easily miss something if Spice doesn't catch it. I lean on the simulator for verification. And Spice is optimistic. It's the common lot of the engineer to obtain real-world measurements are a little worse than theory predicts.
But there's still nothing so practical as a good theory!
My experience has been that when Spice predicts a reduction in distortion from a given circuit change, that change is usually an improvement in subjective listening, or at worst it sounds the same. That could be expectancy bias. When possible I enlist a friend to listen blind to "A" and "B" to reduce this bias.
One mechanism is that in Spiceworld all transistors of a given type are identical. In some cases it could even be that 'complementary' transistors are exactly complementary too. Hence your -120dB distortion is probably sitting at the bottom of a deep and narrow null; vary some parameters and you will quickly climb up the sides of the null.jpc2001 said:
DF96, none of the transistors in either gain stage are complementary pairs. There are also no matched resistors in the gain stage.
With one exception: in the gain stage from post #2, Q1 and Q2 are a complementary pair. The emitter currents match exactly. Base and collector currents will be close but won't quite match, the error depending on the betas. So these two may have slightly different transconductance. Does it matter?
Spice tells us: the KSA1015 model has beta = 180, and the KSC1815 model has beta = 128. If beta matching were critical here, it would show up in the sim.
With one exception: in the gain stage from post #2, Q1 and Q2 are a complementary pair. The emitter currents match exactly. Base and collector currents will be close but won't quite match, the error depending on the betas. So these two may have slightly different transconductance. Does it matter?
Spice tells us: the KSA1015 model has beta = 180, and the KSC1815 model has beta = 128. If beta matching were critical here, it would show up in the sim.
To me it's a small miracle that the whole thing works at all, even in simulation. DC levels in the first stage implemented are literally undefined (all of IN+, IN- and OUT are capactor-coupled), and what's the point of having an output that can only swing between SIGGND and VPOS? I would very much advise looking at DC voltages and currents all over the circuit.
Then there's the issue of low OLG as the circuit is heavily degenerated throughout, so -PSRR in particular would be expected to be less than stellar. Not quite sure why this whole Q4 vs. Q5 thing is working out either.
Then there's the issue of low OLG as the circuit is heavily degenerated throughout, so -PSRR in particular would be expected to be less than stellar. Not quite sure why this whole Q4 vs. Q5 thing is working out either.
sgrossklass,
This circuit is a dedicated preamp, its output will be AC coupled to a power amp input. To drive the power amp rail to rail, we only need a few volts peak-to-peak swing at the output of the preamp. With the output biased to about 12V, and able to swing between ground and the positive supply (around 30V) there should be plenty of margin.
Here's another view of the first gain stage, with the hierarchy flattened to show the DC biasing better. IN+ sits around 5V, due to base currents of Q2 and Q7 flowing through R2 and R3. (It's too bad this depends on transistor beta, but anything within +/- 50% is ok here.)
IN- sits a diode drop above IN+ at 5.7V. The output sits at around 14V, this level is fixed by the 1mA bias current into Q2 flowing through feedback resistor R9.
The plot shows loop gain, measured with the Middlebrook/Tian probe. This circuit has 18db of negative feedback, so OLG would be 18db higher than this line. OLG stays above 60db throughout the audio band, it's a few db higher than an OPA134 opamp's OLG.
Hmm, that's a scary asymptote at 5.5MHz. The loop gain has fallen below unity before this point so it probably doesn't matter... maybe? Placing a 10k resistor in series with C3 kills this asymptote but also reduces distortion performance as the cascode becomes less effective. This could be something to improve.
EDIT: I found that adding a 22uH choke at the emitter of cascode Q7 kills the asymptote and doesn't affect distortion performance at all. Though it doesn't seem wise to build a real circuit with an RF choke in the critical input stage, that could capture all kinds of garbage from the air and couple them into the circuit. Hmm.
This circuit is a dedicated preamp, its output will be AC coupled to a power amp input. To drive the power amp rail to rail, we only need a few volts peak-to-peak swing at the output of the preamp. With the output biased to about 12V, and able to swing between ground and the positive supply (around 30V) there should be plenty of margin.
Here's another view of the first gain stage, with the hierarchy flattened to show the DC biasing better. IN+ sits around 5V, due to base currents of Q2 and Q7 flowing through R2 and R3. (It's too bad this depends on transistor beta, but anything within +/- 50% is ok here.)
IN- sits a diode drop above IN+ at 5.7V. The output sits at around 14V, this level is fixed by the 1mA bias current into Q2 flowing through feedback resistor R9.
The plot shows loop gain, measured with the Middlebrook/Tian probe. This circuit has 18db of negative feedback, so OLG would be 18db higher than this line. OLG stays above 60db throughout the audio band, it's a few db higher than an OPA134 opamp's OLG.
Hmm, that's a scary asymptote at 5.5MHz. The loop gain has fallen below unity before this point so it probably doesn't matter... maybe? Placing a 10k resistor in series with C3 kills this asymptote but also reduces distortion performance as the cascode becomes less effective. This could be something to improve.
EDIT: I found that adding a 22uH choke at the emitter of cascode Q7 kills the asymptote and doesn't affect distortion performance at all. Though it doesn't seem wise to build a real circuit with an RF choke in the critical input stage, that could capture all kinds of garbage from the air and couple them into the circuit. Hmm.
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Forget the choke, it is not needed. Returning the miller cap to the collector of Q2 instead of Q7 avoids the asymptote and doesn't impact distortion performance at all. Yay!
This is one of the weirdest simulations I've ever come across. I can confirm that the distortion is spectacularly low but where it gets weird is that even the sim didn't seem repeatable.
Change the 22uf cap at the output for anything up to 370uF and its fine, go to 371uF and the output has 8 volts DC offset. And where has the gain gone with the 1uF extra ?
Adding a timestep seemed to screw the simulation with the output sitting at some DC level. The transistors seem similarly weird, change just one and the sim worked, change it back and it doesn't.
When I did get a workable FFT it was spectacularly clean with nothing showing at all apart from the fundamental.
Have you tried squarewave testing in the sim ? That's where it all fell apart for me in the sense that what worked OK before now didn't when looking at squarewaves. I undid the changes with LT's edit function and couldn't then get it to work at all without having to deliberately change a part and then change it back again. Nutz
Change the 22uf cap at the output for anything up to 370uF and its fine, go to 371uF and the output has 8 volts DC offset. And where has the gain gone with the 1uF extra ?
Adding a timestep seemed to screw the simulation with the output sitting at some DC level. The transistors seem similarly weird, change just one and the sim worked, change it back and it doesn't.
When I did get a workable FFT it was spectacularly clean with nothing showing at all apart from the fundamental.
Have you tried squarewave testing in the sim ? That's where it all fell apart for me in the sense that what worked OK before now didn't when looking at squarewaves. I undid the changes with LT's edit function and couldn't then get it to work at all without having to deliberately change a part and then change it back again. Nutz
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Mooly,
Here's the latest version I've been testing, plus an .asc file that should be plug and play if you have the KSA1015 and KSC1815 models. Or just substitute 2N3904 and 2N3906 built into LTspice, those work too.
I haven't seen oddities like you describe. Seems like the DC solving step didn't converge?
I saw an asymptote in the loop gain plot, see post 15. Maybe that messed up the DC solver for you? The asymptote is fixed in this version by moving the miller cap to the other side of the cascode transistor Q7. Maybe that'll fix you?
Thanks for testing this out!
Here's the latest version I've been testing, plus an .asc file that should be plug and play if you have the KSA1015 and KSC1815 models. Or just substitute 2N3904 and 2N3906 built into LTspice, those work too.
I haven't seen oddities like you describe. Seems like the DC solving step didn't converge?
I saw an asymptote in the loop gain plot, see post 15. Maybe that messed up the DC solver for you? The asymptote is fixed in this version by moving the miller cap to the other side of the cascode transistor Q7. Maybe that'll fix you?
Thanks for testing this out!
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Thanks.
Yes, that sims OK. Something must have got screwed up in the one I did as it seemed different every time.
Its a peculiar circuit you have but no arguing that the simulated performance is basically good (distortion exceptionally so). The asymmetric, or more specifically the limited output swing would be a concern for me. Just 3 volts or so positive going available.
Squarewave response can be tricky to evaluate in simulation and so I wouldn't guarantee its quite how it looks.
Yes, that sims OK. Something must have got screwed up in the one I did as it seemed different every time.
Its a peculiar circuit you have
but no arguing that the simulated performance is basically good (distortion exceptionally so). The asymmetric, or more specifically the limited output swing would be a concern for me. Just 3 volts or so positive going available.Squarewave response can be tricky to evaluate in simulation and so I wouldn't guarantee its quite how it looks.
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Yes, the output swing is current limited in the pull-up direction, it stops at about 1.5mA, near 3V with the 2.2k load. You could raise the available current with a smaller value of R5, the only cost is higher bias current. Just another mA would give extra margin at the output.
My idea is to design for eg. a 2.2k or 3.3k load, so there's a good safety factor over a typical power amp input impedance of 10k+.
It may look tempting to replace R5 with a current source transistor, using the same voltage reference as the Q5 current source. This turns out not to work: that circuit can get stuck in a state where none of the transistors conduct. That could be avoided with even more elements... but this circuit is complex enough and the resistive loading for the OPS is good enough.
My idea is to design for eg. a 2.2k or 3.3k load, so there's a good safety factor over a typical power amp input impedance of 10k+.
It may look tempting to replace R5 with a current source transistor, using the same voltage reference as the Q5 current source. This turns out not to work: that circuit can get stuck in a state where none of the transistors conduct. That could be avoided with even more elements... but this circuit is complex enough and the resistive loading for the OPS is good enough.
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