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low distortion 6 transistor preamp
low distortion 6 transistor preamp
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Old 21st July 2017, 02:55 PM   #21
DF96 is offline DF96  England
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Perhaps something in the circuit is ill-defined with ideal or simplified component models? That would make convergence a bit hit and miss. If 370uF does X and 371uF does Y then I would not trust either 'solution'.
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Old 5th August 2017, 02:57 AM   #22
jpc2001 is offline jpc2001  United States
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I laid out this circuit into the exact footprint of the Pioneer SA-9500 mkII tone control PCB. Once it's built and running stably I'll upload final .asc and .pcb files somewhere.

What's a good hosting service for publishing the current version of a project like this? Maybe Google drive with world-readable permissions?

There have been a few changes. Notably, in post 15 the loop gain probe was in the wrong place outside of the feedback loop formed by the miller cap. It should be inside both the global NFB loop and the miller cap loop. A rookie mistake! Measuring the loop gain correctly showed that a miller cap was sufficient and so the lead cap is gone.

It would be nice to pair the super low distortion floor with a super low noise floor. Maybe in some future project that would mean an active volume control, balanced inputs, and separate signal-grounds for each channel. Or I'll just build one of Douglas Self's preamps which have all that cool stuff.

For now I'm keeping a lot of the Pioneer's architecture, including the RCA inputs, the 100K log-taper volume pot, the signal ground that both channels share throughout, and the original gain distribution. All the front panel controls will still work including the loudness switch.

Noise wise, the factory Pioneer is fairly quiet driving Khorns, you have to put your ear up to the horns to hear noise (with shorting plugs at the AUX input, volume set to typical listening level.) It sounds close to white noise with a little bit of 60 or 120hz discernible. It's not that bad...

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Old 12th August 2017, 02:19 PM   #23
audio_tony is offline audio_tony  United Kingdom
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The non symetrical output swing causes excessive distortion long before the maximum output level is reached, which limits the input voltage to around 500mV RMS / Output 4.55V RMS (at which point my sim was showing around 0.3% distortion at 10kHz)

At around 70mV RMS input level / Output 650mV RMS I was seeing about 0.046% distortion.

It would seem to be an overly complex design for the performance level available.

This was based on the circuit given in post #18.

The input impedance is very high however.

My (very simple!) 3 transistor discrete preamp yields a measured ~ 0.004% distortion using RMAA.

Last edited by audio_tony; 12th August 2017 at 02:22 PM.
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Old 12th August 2017, 03:48 PM   #24
jpc2001 is offline jpc2001  United States
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Tony,

0.046% is over 100x more distortion for 650mV output than in my sims. Something is wrong.

Try measuring the FFT at the node on the north side of C6, instead of the node labeled OUT? That coupling cap will charge throughout the sim creating an artificially high distortion floor in the FFT. This floor drops away with a 10x longer sim, or a 10x bigger cap, or if you measure a node that isn't influenced by the charging cap.

Maybe check DC levels? We expect:
* Emitter of Q6 should sit at about 12V.
* Current in R6 and R7 should be about 500uA.
* Current in R1 should be about 1mA.
* Q2 should not be in saturation, increase R3 if it is.

Here's the latest version, similar to post 18 except with simpler compensation. Resistor R12 increases stability margin in the presence of a small parasitic at the output, without any distortion cost. The miller cap returns to the other side of the cascode now, so there is one fewer transistor within the miller loop.

With a more typical load (say 22k instead of 2.2k) this circuit can drive its output to a swing of more than 10V peak to peak, double what's required to drive a typical power amp (assume gain of 20 and 60V rails) to clip. With the pessimistic 2.2k load, the circuit will drive the output to 6V peak-to-peak -- juuust enough to clip that same amp. My sim shows -118db distortion when driving a 5V peak-to-peak output into 2.2k. You can scale the current capability up with a smaller value at R5 if needed.
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File Type: asc olg.asc (4.9 KB, 9 views)
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Old 12th August 2017, 04:11 PM   #25
audio_tony is offline audio_tony  United Kingdom
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Could you post an image of the current schematic, I don't have access to LT Spice right now.

Here's my current schematics with AC & DC voltages and currents.

One other thing I noticed - when I initially drew this in Tina, I got Q5 upside down however the sim still worked fine.
Attached Images
File Type: png distortion.png (13.3 KB, 181 views)
File Type: png ac-analysis.png (26.1 KB, 182 views)
File Type: png dc-analysis.png (24.4 KB, 180 views)
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Old 12th August 2017, 05:04 PM   #26
jpc2001 is offline jpc2001  United States
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I don't understand the AC voltages. I wouldn't expect to see 13V RMS on one side of a 22uF, and 650mV RMS on the other side. These numbers should nearly match, right? I am probably misinterpreting this image; I haven't used Tina.

Here's the latest in png form, same as the .asc from post 24.

Thanks.
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File Type: png olg.png (90.7 KB, 173 views)
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Old 12th August 2017, 06:04 PM   #27
audio_tony is offline audio_tony  United Kingdom
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You can ignore the odd RMS value - I think it's a bug in Tina - it is a DC value.

I have simulated with a virtual scope connected and the clipping is severe at 800mV in 4V RMS out.

The onset of clipping occurs at about 368mV RMS in 2.6V RMS out.

The clipping occurs quite abruptly due to the lack of symmetry in the output stage (see scope images for detail).

Ideally you need a current source for Q6 to enable a symmetrical swing.

This will then lower the distortion all the way to maximum output.

Currently the maximum swing at relatively low distortion is about 2.5V RMS (354mV input) - distortion is ~ 0.085%.

The first scope image is at 4V RMS out, the 2nd image is at 2.6V RMS out and is (roughly) at the onset of clipping.

I trust the numbers I'm seeing with Tina, as I have used it extensively to simulate previous designs and after being built the results are fairly close.
Attached Images
File Type: png scope.png (17.9 KB, 169 views)
File Type: png scope-clipping.png (18.2 KB, 24 views)
File Type: png distortion2.png (13.1 KB, 21 views)
File Type: png ac-analysis2.png (24.2 KB, 30 views)
File Type: png dc-analysis2.png (23.9 KB, 37 views)

Last edited by audio_tony; 12th August 2017 at 06:09 PM.
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Old 13th August 2017, 05:17 PM   #28
jpc2001 is offline jpc2001  United States
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Tony,
Good news. I was able to replicate distortion results in Tina that roughly matched what you saw. I got about 250ppm at first.

Then I gave a "Sampling start time" greater than 0 in the Fourier setup -- this shows a much lower distortion figure. Starting the fourier analysis after 10 cycles produces a distortion number from Tina that matches LTspice, within a factor of 2.

That makes sense -- I also use a delayed start to the analysis in LTspice. Typically I'll run a transient analysis for maybe 6ms or 10ms, and then run the FFT over only the latter half of the data. If you run the FFT over the full simulation, you get a bunch of artifacts, a "tall grass" on the spectrum plot.

Why do the simulators do this? The story I've always told myself is that the DC solver doesn't quite agree with the transient sim, which settles at slightly different DC values over the first cycle or two of simulation. The tall grass only shows settling artifacts, not real circuit performance.

Another possibility is that the presence of the signal moves the DC operating point, implying the "tall grass" distortion is real. This is easy to test: we can start the FFT halfway through the sim and also start the input signal at the same time. I tried that in LTspice and got the same -120db distortion as when applying the input signal over the whole sim. So whatever causes the tall grass, it's not the sudden application of a signal.
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File Type: png tina_pre.png (100.6 KB, 44 views)
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Old 14th August 2017, 09:30 AM   #29
audio_tony is offline audio_tony  United Kingdom
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But that doesn't eradicate the asymmetrical clipping issue?

The scope images I posted were based on steady state operation, so you will still have high distortion at even moderate output swings.

If I find the time, I might 'breadboard' the circuit to confirm the sim output, however I suspect that even the physical circuit will also produce distortion.

When I run the sim at very low amplitudes, I also see very low distortion, but then I would, because the output is not clipping...
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Old 14th August 2017, 12:08 PM   #30
jpc2001 is offline jpc2001  United States
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I don't see a clipping issue.

Attached is a sim of the exact schematic from posts 24 and 26, with the output swinging 3V peak-to-peak. The distortion floor is -120db below the signal. This is with the pessimistic 2.2k load.

If we turn it up to 6V peak-to-peak output -- enough to clip an amp with 60V rails -- distortion floor is then around -115db. We never need more signal swing than this, and the preamp is not yet clipping.

Edit: I agree with your images from post 27, this is where clipping starts with the 2.2k load. So, there's not much headroom between 3V (the max amplitude we might really use) and 4V (onset of clipping) and we might want more headroom than this. As you suggest, a current source would do it. We also have more headroom if you assume the power amp input impedance is more typical like 10K+.
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File Type: png olg.png (31.1 KB, 43 views)

Last edited by jpc2001; 14th August 2017 at 12:30 PM.
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