No problem, I really appreciate the help. The numbers are so very far out, I did not trust them either, add to that my inexperience, and you have a recipe for uncertainty.
I don't have quite the part right values for the circuit, but I will try a few things and definitely keep you posted!
Thank you very much!
I don't have quite the part right values for the circuit, but I will try a few things and definitely keep you posted!
Thank you very much!
Hello again!
This is strange.... using pin 1,2,3 = S,G,D as per Toshiba....
Pin 1 = floating
Pin 2 = to 3K05 Ohm resistor,
Pin 3 = to Ammeter.
Applying -10V to Pin 2 resistor gives 2.91 mA out of the drain.
Pin 1 = floating
Pin 2 = to 470 Ohm resistor,
Pin 3 = to Ammeter.
Applying -10V to Pin 2 resistor gives 17.91 mA out of the drain.
Pin 1 = floating
Pin 2 = bare,
Pin 3 = through Ammeter.
Applying -10V to Pin 2 gives 122 mA out of the drain.
Attaching the floating pin 1 to -10V directly or through 470 ohm resistor does nothing at all!
This is strange.... using pin 1,2,3 = S,G,D as per Toshiba....
Pin 1 = floating
Pin 2 = to 3K05 Ohm resistor,
Pin 3 = to Ammeter.
Applying -10V to Pin 2 resistor gives 2.91 mA out of the drain.
Pin 1 = floating
Pin 2 = to 470 Ohm resistor,
Pin 3 = to Ammeter.
Applying -10V to Pin 2 resistor gives 17.91 mA out of the drain.
Pin 1 = floating
Pin 2 = bare,
Pin 3 = through Ammeter.
Applying -10V to Pin 2 gives 122 mA out of the drain.
Attaching the floating pin 1 to -10V directly or through 470 ohm resistor does nothing at all!
The gate to drain and gate to source channels do behave like a diode, that is why the meter beeps. If you've pulled over a 100ma through the device then it may have been impaired even if it seems to function OK at a basic level.
For the majority of JFET's, the drain and source are not defined, you can use either pin and call it drain or source, it doesn't matter. The device is symmetrical.
Although I never recommend the hFE function built into many DMM, they are good at identifying BJTs. It confirms the pin out as well as PNP NPN.
I have a 4pin 0.1" socket with 4 wires that plugs into the 4holes of the hFE function.
This allows me to check To126 and To220 devices which are too big to fit the DMM.
When will we see a FET identifying function on our DMM?
I have a 4pin 0.1" socket with 4 wires that plugs into the 4holes of the hFE function.
This allows me to check To126 and To220 devices which are too big to fit the DMM.
When will we see a FET identifying function on our DMM?
It sounds suspect then. A good basic method of testing is to use an LED and resistor as a load and then vary the gate voltage to see how it performs and whether it cuts off OK. A FET will go wild with a floating gate, even as you just approach it with a finger, a bjt will not.
When -10V is attached to the Source and the Gate floats, no current flows.
When the Gate is attached to the Source and -10V is applied, then 122 ma flows. One would think that is due to Vgs = 0 and the jFET is very powerful.
However, when the -10V is removed from the Source, 122ma still flows trough the Gate.
When the Gate is attached to the Source and -10V is applied, then 122 ma flows. One would think that is due to Vgs = 0 and the jFET is very powerful.
However, when the -10V is removed from the Source, 122ma still flows trough the Gate.
Yes it will do because the G-S or G-D (they are the same remember for most JFET's) junction is similar to a diode.
In normal use the FET doesn't operate in that region that causes the G-S channel to conduct. It operates "below" that threshold, say from 0.2 or 0.3 volts maximum (so the G-S channel doesn't conduct, through to negative G-S voltages that "pinch off" or "open circuit" the D-S path. The FET is fully on with around 0.2 volts turning the gate on relative to the source. Go any higher and the G-S channel starts to conduct (which is unwanted) and it levels out at around 0.6 volts because it is just like a diode junction at a basic level.
I'm not able to collaborate with claims that biasing the output stage as pseudo-class A improves the performance. The problem that lies with the theory begins with the practical aspect of the design. The microscopic devices on the chip are laser matched and feature an incredibly linear behavior as a result of the flat transconductance curve and precision matching. When properly implemented on a board with attention placed on adaquate feedback, the harmonic distortion is far below audibility. As to some of the cheaper chip, there will be room for improvement, but performance chips that have been designed for audio application are already adaquately biased. Some chips exhibit distortion in the 0.00008% regions, and no human can even hear distortion at 0.001%. Trying to hear secondary emissions at this level is akin to trying to hear an HT transformer chassis hum during a rock concert. It's drowned out by everything else.
The symnosis behind higher biasing is to move up the transconductance curve, or to reduce crossover distortion. Crossover distortion is quantified as a component of harmonic distortion that remains at a constant level and frequency regardless of the input level, or frequency. The crossover distortion on either the drive stages or the output is neglibible, because its typically magnitudes lower than even the stoiciastic noise floor of the chip. Biasing the output stage higher still leaves the driver bias untouched, and the earlier stage determines the lowest possible cumulative noise floor and crossover distortion value. By inacting a constant current source on the output stage of the chip, it does not become single ended - this has been one of the largest misconcetions in DIY audio. The constant current source sinks more current at the ouput stage, but it is still class AB due to the inherent design topology and the fixed bias value. As soon as a load is attached with a lower impedance or high capacitance, the stage will revert to class AB.
The only ways to entice the output stage to behave as a single ended amplifier is to actually use a single device, or to employ single ended push pull; SEPP was invented and patented by Yamaha during the '70's, and allowed a class AB or H amplifier to be dynamically biased in accordance with the input signal magnitude. This was different than the inefficient sliding bias schemes, or their own earlier fixed bias class A/AB hybrids. For SEPP, the signal has to be converted to a current waveform through a V-to-I converter, belonging in another patent of theirs. The output stage converts the signal back to a voltage waveform. The crossover distortion cannot exist in this scenario, and it was very useful for lowering output stage distortion into heavy loads. The additional advantage was voltage-noise isolation. Today, Krell uses this system as it is very noise efficient to amplify in the current domain. However, it requires a completely different set of design principles.
The symnosis behind higher biasing is to move up the transconductance curve, or to reduce crossover distortion. Crossover distortion is quantified as a component of harmonic distortion that remains at a constant level and frequency regardless of the input level, or frequency. The crossover distortion on either the drive stages or the output is neglibible, because its typically magnitudes lower than even the stoiciastic noise floor of the chip. Biasing the output stage higher still leaves the driver bias untouched, and the earlier stage determines the lowest possible cumulative noise floor and crossover distortion value. By inacting a constant current source on the output stage of the chip, it does not become single ended - this has been one of the largest misconcetions in DIY audio. The constant current source sinks more current at the ouput stage, but it is still class AB due to the inherent design topology and the fixed bias value. As soon as a load is attached with a lower impedance or high capacitance, the stage will revert to class AB.
The only ways to entice the output stage to behave as a single ended amplifier is to actually use a single device, or to employ single ended push pull; SEPP was invented and patented by Yamaha during the '70's, and allowed a class AB or H amplifier to be dynamically biased in accordance with the input signal magnitude. This was different than the inefficient sliding bias schemes, or their own earlier fixed bias class A/AB hybrids. For SEPP, the signal has to be converted to a current waveform through a V-to-I converter, belonging in another patent of theirs. The output stage converts the signal back to a voltage waveform. The crossover distortion cannot exist in this scenario, and it was very useful for lowering output stage distortion into heavy loads. The additional advantage was voltage-noise isolation. Today, Krell uses this system as it is very noise efficient to amplify in the current domain. However, it requires a completely different set of design principles.
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^ good post 
(My own limited experiments in this (using CC diodes as a "load") with then OPA2134's was not the success I had hoped. Over long term listening I just felt things were less good... very subjective, couldn't really pin anything specific down... it just wasn't as good a listening experience to my ears. Since then, and after much listening I settled on LM4562's which tick all the right boxes for me)
(My own limited experiments in this (using CC diodes as a "load") with then OPA2134's was not the success I had hoped. Over long term listening I just felt things were less good... very subjective, couldn't really pin anything specific down... it just wasn't as good a listening experience to my ears. Since then, and after much listening I settled on LM4562's which tick all the right boxes for me)
That`s the theory but in real life class-a biased output sound lot better, maybe not for all opamps but in case of LT1363 for shure, I`ve tried it. BTW LT1363 has a diamond ops.
I don't know the answer to that one offhand but suspect that its a non issue because any noise fluctuation should be rejected by the opamp. For example, imagine replacing the CCS with a voltage source of say a few mv and an impedance of a few k. The opamp output should see no change. Either CCS scheme is magnitudes below that anyway.
But as to which is intrinsically quieter... I don't know but might suspect the resistor would induce less "current" fluctuation attributable to internally generated noise.
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