|23rd February 2013, 11:30 AM||#11|
Join Date: Dec 2012
I've been playing with similar topologies useing IXCY 10M45S as D-mode mosfets and they produce very nice sound. I don't know how they measure or sim. In the end I found the low frequency waveforms look just as good with the simplest possible single ended layout driving a 15K or higher load.
The 10M45 and 10M90 have good linearity in simple circuits. Checkout the curves. cheap and easy.
|23rd February 2013, 01:43 PM||#12|
Join Date: Nov 2004
Location: close to Basel
have a look at this .asc.
The left circuit is as in Your first post apart from different transistors and R5.
The 4393 is sourced from the same process 51 as the PF5102 (of which I donŽt have a sim-model).
It has no buffer at the output and shows a bit weird behaviour regarding amplitude response and squarewave slewing.
To sim the squarewave resonse simply drag the ŽinŽLabel from Vsine to Vsquare and change the tran command to .tran 0 500m 490m
The middle circuit would be a proposal of a similar circuit with dual supply and difference input.
It runs the difference amplifier input on higher bias currents.
A simple JFET-CCS made from a J5 stabilizes the tail current and improves nearly every parameter of the difference amp, like CMRR.
Even utilising only source degeneration and no back-feeding loop, the THD is lower.
The added cascoded JFET buffer is virtually transparent THD- and noise-wise, at least for higher load impedances >10k.
Output impedance is low at ~100Ohms. If R24 is omitted with Zout lowers to ~45Ohms.
The heat power losses of the transistors are shared and reduced.
The simple JFET-Buffers in Your later schematics add THD to the input stageŽs own THD.
Since the circuit is supplied by symmetrical supply voltages, the dc-blocking cap sits between the difference-amp and buffer.
As R21 is constant and quite large, the cap may be chosen smaller as if it were positioned in the buffers output.
The lower bandwidth limit remains fixed, regardless of the connected load.
If buffer JFETs J6 and J8 are matched and J6 through J9 are thermally coupled, the output offset remains so small that another output dc-blocking cap becomes obsolete. Any remaining output offset may be fine tuned by trimming R26 or also matching the cascode transistors J7 and J9.
The only parameter in this design becoming worse is noise. The value is still very ok.
Circuit 3 is a single ended variant with a higher valued single positive supply of 24V.
The input JFET is runnig on lower bias current, thereby also reducing heat power loss. It uses the 4391 JFET with high Idss and accordingly large pinch-off voltage. This voltage needs to be larger than the input signal voltage if the source resistor is gnd referenced.
J15s drain resistor is split up. R43 is chosen to achieve the correct gain, while R49 simply drops a few volts, so that J15s drain voltage sits at roughly half the supply voltage. R49 in conjunction with C16 also filters the supply voltage giving at least a bit of PSRR.
Due to the single supply the buffer input must be directly coupled to J15s drain. It is otherwise the same cascoded JFET buffer as before. The output should sit at roughly half the supply voltage, if the power heat losses in the upper and lower cascode should be equal. R49 may be trimmed to give 1/2 supply voltage. A dc-blocking cap is required towards the output connectors.
This stage also just relies on source degeneration. Its THD is higher than the first circuits, but only K2. All other are on level or lower level, than for circuit 1 or circuit 2. While K3 is the dominant in the THD of the first and second circuit, the single ended circuit shows a clean decay towards the higher Ks.
Usually such a THD distribution sounds very well even if the quantitative level is high.
The Noise figure of circuit 3 is the lowest of all three.
Circuit 2 and 3 show very smooth amplitude response and beautiful squarewave response even wo. the input filtering.
I can assure You that circuits like 2 and 3 can sound more musical, natural and lifelike than any Opamp stage.
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