JFETs and MOSFETs biasing questions

[Joshua_G]

I've got few 2SK170, some are of 8mA IDSS and some are of 10mA.
I intend to use some in RIIA and some in a line stage, all are source follower with non-bypassed source resistor.
What current would be best to bias those JFETs:
1. For best linearity (lowest distortion);
2. For maximum output swing.

Also, I've got few 2SK214, intended to be used as source follower with non-bypassed source resistor.
What current would be best to bias them?

 

[Chris Hornbeck]

In general, JFETs won't conduct gate current up to very close to zero bias, (and MOSFETs never do). For best small signal linearity you'd run them right up next to zero bias (close to Idss) because this gives highest transconductance and because the slope is most linear there.

For maximum output swing you need to talk about expected loading first. You're limited at the top end by gate conductance, and you want to split the difference. 2SK170 is still in the linear region with only a few volts left across it drain to source. Really calls for a graphic solution. Old skool.

All good fortune,
Chris

 

[Joshua_G]

In general, JFETs won't conduct gate current up to very close to zero bias, (and MOSFETs never do). For best small signal linearity you'd run them right up next to zero bias (close to Idss) because this gives highest transconductance and because the slope is most linear there.

Thank you.
When gate bias is few mV and the signal is about 1V, wouldn't the gate conduct with the signal?

 

[Chris Hornbeck]

Not sure I'd consider 1 Volt to be small signal, but anyway the signal voltage of interest is that between gate and source (for a follower), which is much less than input (almost equals) output voltage.

You'll hear rules of thumb of a few hundred milliVolts forward as still non-conductive, for JFETs, and most folks just think of the gate-source as if it were an ordinary silicon diode for forward conductance. Close enough for DIY at least.

All good fortune,
Chris

 

[john curl]

5-6ma, Joshua