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Old 30th January 2013, 05:06 PM   #131
gagnou is offline gagnou  Greece
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Hi Dadod,
thanks for the exciting designs you're presenting in this forum.
Regarding your schematic in post #128 I think Q13, Q14 (and Q21, Q22 on the the negative side) will face an undefined biasing state on startup (chicken - egg situation).
I would suggest a 100k (or higher) resistor from Q13 base to V+ (same from Q22 base to V-).
Best regards,
George
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Old 31st January 2013, 06:34 AM   #132
dadod is online now dadod  Croatia
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Quote:
Originally Posted by gagnou View Post
Hi Dadod,
thanks for the exciting designs you're presenting in this forum.
Regarding your schematic in post #128 I think Q13, Q14 (and Q21, Q22 on the the negative side) will face an undefined biasing state on startup (chicken - egg situation).
I would suggest a 100k (or higher) resistor from Q13 base to V+ (same from Q22 base to V-).
Best regards,
George
Thanks for suggestion George. Actually I was listening to this circuir Current conveyor as a voltage amplifier as I made PCB beffore all other improvement were simulated (by the way simulation did not show an undefined biasing state). As just now I am designing my shunt regulator and when finnished I will test all those different combinations and I'll report result.
Damir
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Old 31st January 2013, 09:22 AM   #133
gagnou is offline gagnou  Greece
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I think Q13 needs some initial base current to act as a cascode for J3, thus causing the necessary voltage drop on R17, turning on Q14 and providing more current for zener D1 and Q13.
Haven't built the circuit though, just based on my understanding of the circuit.
Best regards,
George
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Old 31st January 2013, 09:56 AM   #134
dadod is online now dadod  Croatia
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After some simulation attempts here is output impedance graph.
I would like to hear opinions if output impedance between 2 and 6 miliohm is low enough, or Ishould go for more sophisticated circuit.
dado
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Old 31st January 2013, 05:33 PM   #135
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That is already quite low. More importantly, compare the output impedance with an inductor. How much output inductance does it have?

At this point you may as well start building it. The circuit is so powerful that you will probably need to get layout sorted out before you can stabilize it, and it will need to be stable before anything else will ever matter.

R14 and R5 may be redundant because the FETs are already driven by a large source impedance. I wonder if they could even worsen stability.

What is the output impedance up to 50MHz? Have you included the ESL of C3 and C1?
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Old 31st January 2013, 05:46 PM   #136
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If the output buffer fails to turn on at startup, you'll notice it when signal is first applied, at which point the output will initially snap to the triggering level and then act as though it never happened. This may not be audible and should not destroy anything, but you should check zener voltage right after startup to see if it turns on by itself. Something like gagnou suggests would fix it.

Last edited by keantoken; 31st January 2013 at 05:48 PM.
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Old 31st January 2013, 07:12 PM   #137
smms73 is offline smms73  Portugal
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I have download the ltspice file that you post , and have tested , there are alterations that i would like to propose, if you guys do not mind.
First is to lower the voltage , it does not make much sense that hight voltage, you will be ok with minus/plus 15 volts , less power waste. And less thermic problems with the circuit. Other is to change the mirrors transistors (bc550c) with bc327-40 and bc337-40, they should be better in dealing with the current that the circuit use, the distortion will be lower.

The 2sa1381 and 2sc3503 is a very good choice , but the cordell models are a bit to much optimist in respect to early voltage, so expect a litle more distortion in reality that with the simulation, but in the overall it seems a good circuit .

I use current sources instead of mirrors , I get even lower distortion that this circuit post here:

dac I/V convertion with very low distortion
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Old 31st January 2013, 07:53 PM   #138
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I brought up similar points in the beginning of this thread.

In your circuit, Q7 and Q8 cause the same function of the Baxandall cascodes in this circuit. Difference is, your circuit has a very high output impedance so it can't be compared with this one. Adapt your circuit to give similar Zin, Zout and gain and then we can toss boulders.

Early voltage of the A1381/C3503 should not matter if the Baxandall pairs do their job.
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Old 31st January 2013, 09:20 PM   #139
dadod is online now dadod  Croatia
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Quote:
Originally Posted by keantoken View Post
That is already quite low. More importantly, compare the output impedance with an inductor. How much output inductance does it have?

At this point you may as well start building it. The circuit is so powerful that you will probably need to get layout sorted out before you can stabilize it, and it will need to be stable before anything else will ever matter.

R14 and R5 may be redundant because the FETs are already driven by a large source impedance. I wonder if they could even worsen stability.

What is the output impedance up to 50MHz? Have you included the ESL of C3 and C1?
This simulation is with small Miller capacitor connected to Q1 and Q2 and it is up to 1GHz, and should be stable.
Looking at phase there is no significant inductance up to 20kHz.
One think were I have my concern, jfet CCS between Q1 and Q2 bases. In the simulation it looks good, but does 1.3V is enough for 2SK170 to behavs as good CCS at 1.7mA??
dado
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Old 31st January 2013, 09:21 PM   #140
dadod is online now dadod  Croatia
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sorry the simulation is here.
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