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Old 30th August 2012, 10:21 AM   #531
bcarso is offline bcarso  United States
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Quote:
Originally Posted by EUVL View Post
We have difficulties getting hold of the BL grade. And we would love to do our own measurements.
If you have a source (other than Wayne) that we can obtain a few samples, please drop me a line.

More to follow...


Patrick
I think another friend mentioned the BL, but I hope I didn't just dream it Yes, it would be nice to have more current. Especially now that I found my blunder!

EDIT: I'll try to do a better measurement of Ig after some more sleep. I could infer it by guessing at what the 10M-loaded follower gain is and hence what the effective laod R was, but a more direct measurement with a high-meg R is also possible with some attention given to shielding. I'll bet it is a good deal less than a nA (which is the max spec for the conventional hookup).

Last edited by bcarso; 30th August 2012 at 10:43 AM.
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Old 30th August 2012, 10:44 AM   #532
EUVL is offline EUVL  Europe
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> Especially now that I found my blunder!

So at least we can still trust Toshiba quality.

Below our own measurments of a Toshiba 2SK3320GR, same device but smaller package.

Red line = FET1 DS-reversed
Orange X = FET1 DS-proper
Black line = FET2 DS-reversed
Green X = FET2 DS-proper

X-axis is Vgs in V, Y-axis is -Id in mA.

So as one can see, decent matches between FET 1&2.
And no measureable differences with reversed Drain-Source.

More measurements to come in the next weeks....
XEN Audio at your servive.


Patrick
Attached Images
File Type: png 2SK3320 DS Reverse.png (126.8 KB, 373 views)
File Type: jpg 2SK3320GR-tester.jpg (387.8 KB, 349 views)
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Last edited by EUVL; 30th August 2012 at 10:57 AM.
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Old 30th August 2012, 10:56 AM   #533
EUVL is offline EUVL  Europe
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I used Google to translate the website I linked in an earlier post :

Discrete Opamp Open Design

As you can see the topology is essentially identical to the "Constellation" circuit John posted here first.

This particular topology is known as the Kaneda topology and is extremely popular. You can find hundreds of DIY projects from IV converters, preamps, power amps, .... based on the same. The first circuit was supposedly published in 1973 by Professor Akihiko Kaneda. I guess in those days the rest of the world was not paying much attention to Japanese audio design.

I post the translation here for your interest. The author also has a few interesting device choices.


Patrick
Attached Files
File Type: pdf JP Discrete Opamp SMD Public.PDF (164.3 KB, 181 views)
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Old 30th August 2012, 11:01 AM   #534
bcarso is offline bcarso  United States
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Quote:
Originally Posted by EUVL View Post
> Especially now that I found my blunder!

So at least we can still trust Toshiba quality.

Below our own measurments of a Toshiba 2SK3320GR, same device but smaller package.

Red line = FET1 DS-reversed
Orange X = FET1 DS-proper
Black line = FET2 DS-reversed
Green X = FET2 DS-proper

So as one can see, decent matches between FET 1&2.
And no measureable differences with reversed Drain-Source.

More measurements to come in the next weeks....
XEN Audio at your servive.


Patrick
Could you also measure the two on resistances, forward and reversed? I don't think that was an artifact of my setup, but it is not impossible.

But we would expect near-symmetry, as observed, unless something strange was going on. Also, despite the relatively small Idss, according to the datasheet the gm should still be high enough at that Idss to give of order 1nV/sqrtHz (based on the first-order theory of the equivalent noise resistance being 0.67/gm).

Yes, except for the rather limited power dissipation, I think these parts can be quite versatile indeed.
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Old 30th August 2012, 11:13 AM   #535
EUVL is offline EUVL  Europe
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> Could you also measure the two on resistances, forward and reversed?

Not possible in our current setup.
And we don't intend to use it as a switch.

We specialised in customised heat sinks.
So abit of dissipation does not really worry us.


Patrick
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Old 30th August 2012, 11:25 AM   #536
bcarso is offline bcarso  United States
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Quote:
Originally Posted by EUVL View Post
> Could you also measure the two on resistances, forward and reversed?

Not possible in our current setup.
And we don't intend to use it as a switch.

We specialised in customised heat sinks.
So abit of dissipation does not really worry us.


Patrick
Well the nice thing about typical SOT-packaged JFETs is that the gate lead is what the chip sits on, so despite the small size it is possible to do fairly effective heat sinking. If in fact (as a friend speculates) the 2145 may be actually two isolated chips before the common-source connection, maybe it too has each chip on a gate lead. I wish I had an x-ray machine handy.

And yes the parts mentioned are BL, I went back and found the email.

Now to sleep, perchance to dream
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Old 30th August 2012, 01:06 PM   #537
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Quote:
Originally Posted by gpapag View Post
Case 1 (Silicon mass temperature at t0: Ts0=20C)is for a typical case of an IC in ambient temperature.
Case 2: (Silicon mass temperature at t0: Ts0=40C)is for the case of an IC intentionally control heated.

If you think that Ta=100C and Tb=70C are unrealistic, please put reasonable numbers.
First, I did not disparage the numbers as unrealistic.

OK, lets assign a thermal resistance between the chip bottom and the transistors. For a transistor 10 mils by 10 mils and 15 mils thick, the equation is: (note, math aint my strong point, let me know if anybody sees errors..
(linear distances in inches)
R = thickness/(K times area) degrees C per watt. (k for silicon, 3.3)

R = .015/(3.3 times .01 * .01

R = 1.5 10e-2/( 3.3 * 10e-2 * 10e-2)

R = (1.5/3.3) 10e+2, or... 45 degrees c per watt.

Your case 1:

base at 20, T1 at 100, 80 degrees rise, dissipation needed: 80/45, 1.77 watts.
T2 at 70, rise of 50, dissipation required: 50/45, or 1.1 watts.

case 2.

base at 40:

T1 60 degree rise, 1.5 watts dissipation.
T2 30 degree rise, .66 watts dissipation.

Summary,

case 1 the chips dissipate 1.77 watts and 1.1 watts, a ratio of 1.6.
case 2, the chips dissipate 1.5 watts and .66 watts a ratio of 2.2.

Your thinking is flawed only in that you are setting the chip temperatures without regard to the dissipation required to do so.


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Old 30th August 2012, 02:58 PM   #538
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Quote:
Originally Posted by RNMarsh View Post
Here is a really simple topology and circuit that meets my goals:

\0
Except it's not an op-amp and not an easy drop in in lots of places. Does not scale easily to phono use either.
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Old 30th August 2012, 04:11 PM   #539
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Originally Posted by scott wurcer View Post
Except it's not an op-amp and not an easy drop in in lots of places. Does not scale easily to phono use either.
However it is nice to have universal building blocks, but for critical applications specialized solutions will be always better.
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Old 30th August 2012, 04:18 PM   #540
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> Except it's not an op-amp and not an easy drop in in lots of places.
> Does not scale easily to phono use either.

Isn't it a ' current feedback ' op-amp ?
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