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Old 29th August 2012, 07:13 PM   #501
bcarso is offline bcarso  United States
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Quote:
Originally Posted by john curl View Post
Bcarso, I think you will find that the actual voltage noise derived from Gm is Re/2. The derivation is not obvious, but at least it does track Gm.
Isn't that what I said? If not, I wasn't being clear. I refer to it colloquially as a "half-thermal" noise.

To put some numbers to the remark about adequate collector current, with the voltage noise from the collector current shot noise, for one of the amazingly low rbb' parts like the 2SA1316 (~2 ohms), for the shot noise contribution to be the same as the thermal in 2 ohms, you need to run about 6.5mA. But if the beta is 500, the shot noise in the 13uA base current (the minimum noise ---usually it is rather higher than that, particularly at low frequencies) is about 2pA/sqrtHz. So the net voltage noise would be about 257pV/sqrtHz, and you will have again that much noise with the 2pA and a 126 ohm impedance source. So low impedance sources are indicated. I saw one stage run at about 125uA but using some of the low rbb' parts. The two devices were effectively in parallel so if similar their e sub n would be about 930pV/sqrtHz. That's low, but rbb' for each device could be a lot higher before you would see much of an effect.

Last edited by bcarso; 29th August 2012 at 07:32 PM. Reason: example
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Old 29th August 2012, 07:28 PM   #502
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You are correct, Bcarso. You DID get it right. I didn't read your entire statement completely enough.
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Old 29th August 2012, 07:34 PM   #503
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> I already apologized for the typo.

Ninguna problema.
And I apologize for the ignorance.

> I meant 47 Ohm, but if to consider
> non - zero emitter resistance and
> non - infinite beta 26 Ohm indeed
> would be closer.

O.K.

> But input resistance will be no higher
> than 10K, so of course you can't
> substitute directly in all cases.

If I had a 470 Ohm emitter resistor,
and hfe of 100, wouldn't input
resistance be 47 k ?
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Old 29th August 2012, 07:42 PM   #504
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Originally Posted by scott wurcer View Post
George if you diagram it using (I know over simplified) the circuit analogy of input power as current, ThetaJ as a resistance, and temperature as voltage, you will see the point. Raising ambient ("ground") does not change the delta V's anywhere.
Here's a rudimentary semi-1D drawing. I have 4 chips, each dissipating equally. I put the dissipation exactly at the center of each chip for simplicity.

The sink is on the right, so all the heat flux must go towards it. While doing so, it causes a temperature rise in the substrate.

Note the differential A, it is the rise caused by chip 1 heat flowing towards the sink. B is the rise caused by the sum of chip 1 and 2 heat. C is of course, chip 1,2,and 3 causing the rise.

Note that the ambient rise is on the far right. The chip to chip rise is determined entirely by the power dissipated by each chip and the thermal conductivity of the substrate. If the substrate conductivity is not temperature dependent, then the rise chip to chip will remain independent of the ambient to sink rise.

Note also, the slope of the line between chips is proportional to the power flow. B is a large drop simply because it is a longer one. I made sure the slopes of the temp were correct with respect to the power total in the region.

jn
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Last edited by jneutron; 29th August 2012 at 07:45 PM.
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Old 29th August 2012, 07:56 PM   #505
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Before we get too confused about a lot of things, let's put things in order.
First, if you have an active load, you should try to reduce the intrinsic (noise) gain of the load by reducing Gm through any means available, usually a series R.
You have to look at the whole input device assortment to determine how much FORWARD gain you will have. It is NOT the NOMINAL voltage gain, but the effective Gm(R[load]) where R[load] will be a very high and almost undefined impedance.
So since both the active load and the input see R[load] then the only thing you have to compare is their intrinsic voltage gain, each one, and the self noise of the active parts.
The 'trick' is to lower the Gm of the active load, to be lower than the effective forward Gm, in each leg, of the source.
This is NOT as easy as it might look.
To intuit the process, think about a SUMMING amplifier, where you have 2 separate active sources contributing. IF you do not use enough emitter or source resistor degeneration, you WILL not achieve what the input stage, itself, is capable of.
I was SHOCKED, shocked I tell you, when R.G. Meyer handed out a complete Spice analysis of the uA741, and SHOWED that it could have been quieter, except for the active load, in 1971.
Those with a sophisticated Spice program with separate noise contributions shown in a given design, would give further insight.
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Old 29th August 2012, 08:12 PM   #506
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Originally Posted by jneutron View Post
I have hilted in red the salient point we disagree on. The local delta T will not increase as the entire widgit increases in temperature.

The local delta T will be dependent on the heat flow between the components of interest, not on the absolute temp. As I pointed out, if the thermal conductivity between the local chips changes as a result of absolute temperature, so will the delta T between them.


I believe bcarso and I are agreeing, and we think differently from you.

Perhaps when I get the time, I could draw it up, verbal descriptions are not easy to express nor follow at times.

cheers, jn
It's like a voltage difference across a resistor. If you increase the voltage on both sides by, say, 100V, the current through the resistor doesn't change.

jan
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Old 29th August 2012, 08:21 PM   #507
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Originally Posted by janneman View Post
It's like a voltage difference across a resistor. If you increase the voltage on both sides by, say, 100V, the current through the resistor doesn't change.

jan
Exactly.

The big problem with thermal however, is the heat capacity.....it makes objects act like a "capacitor", while long lengths can act like "inductances".

Another problem is how a substrate or pc is heatsunk. If the thermal conduction to the sink is low, the entire substrate will act as an isothermal island and it will take a long time to stabilize.

On a single chip, the issue not as bad given the distances involved.

jn
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Old 29th August 2012, 08:37 PM   #508
ief is offline ief  Netherlands
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Noob rambling on about Dc, must be AC then for sure.

Never new it even existed in this regard. Tnx Scott for clearing that up, I'll commence reading again
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Old 29th August 2012, 08:44 PM   #509
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Originally Posted by jneutron View Post
The big problem with thermal however, is the heat capacity.....it makes objects act like a "capacitor", while long lengths can act like "inductances".
We added device temperature as an independent variable to our simulator long before it was common. Another problem turns out to be that heat flow uses diffusion equations and the RC models are only an approximation. There is a wonderful paper on IC thermals by Billotti (sp?) deriving the relationships mathematically, the rule of thumb we use is about 15dB/die thickness which I remember as the heat goes in one face and comes out the other 5. It was amazing how close the intuitive answer was to the result of all the equations.
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Last edited by scott wurcer; 29th August 2012 at 08:48 PM.
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Old 29th August 2012, 08:49 PM   #510
RNMarsh is offline RNMarsh  United States
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If you use regulated, very low z, low noise power supplies, what is the minimum psrr needed to not be an audible issue? [using topologies being discussed here].

Thx,
RNM
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