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Old 24th October 2012, 03:59 AM   #1871
bcarso is offline bcarso  United States
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Quote:
Originally Posted by fas42 View Post
For people's information, I just tried the model of the BF862 that's being used in LTspice, and it does add a gentle curve, slope decreasing towards zero gate voltage, to the transconductance characteristic; a simple, minimal spec'd set of parameters for a JFET just traces a straight line, otherwise.

Frank
I've been meaning to download LTSpice. It seems to be becoming something of a de facto standard.
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Old 24th October 2012, 07:54 AM   #1872
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Originally Posted by RNMarsh View Post
.. you can cancel completely the Miller C by added input c --- the effective output C formed by the stage gain when matched with input C, will cancel. ... and distortion from this source is reduced.
I'm not sure you gain much from this.

The two major distortion mechanisms of 'Miller' capacitance are
  • degraded PSR cos the PS directly modulates the VAS (and also a none cascode LTP) via the 'Miller' capacitor. Often appears as THD unless your PSU is as complex as the amp.
  • Cob is highly non-linear cos it depends on Vcb
You can only cancel the 'linear' part of the 'Miller' cap but this does not help the distortion at all. It might help zillion GHz response in some topologies but this isn't a problem in either the FET990 & the WurcerOPA. Both are pretty supa for response.

The improvements I've managed on FET990 are mainly by dealing with these 2 issues which I can confirm are very real from my misspent youth.

I'm rather impressed that LTspice seems to sim these quite nicely.

Any FET guru care to pontificate on the above as my real life experience with the above is all with BJTs?
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Old 24th October 2012, 09:22 AM   #1873
RNMarsh is offline RNMarsh  United States
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Quote:
Originally Posted by kgrlee View Post
I'm not sure you gain much from this.

The two major distortion mechanisms of 'Miller' capacitance are
  • degraded PSR cos the PS directly modulates the VAS (and also a none cascode LTP) via the 'Miller' capacitor. Often appears as THD unless your PSU is as complex as the amp.
  • Cob is highly non-linear cos it depends on Vcb
You can only cancel the 'linear' part of the 'Miller' cap but this does not help the distortion at all. It might help zillion GHz response in some topologies but this isn't a problem in either the FET990 & the WurcerOPA.
Your experience is exactly the same as mine. In fact, I could fine tune the cancellation to a null-once I was close - by adjusting the supply voltage. So, yes, a stable ps voltage is required. Its a first order cancellation that for a high gain input stage could open its bandwidth and help lower thd at the high end for gnfb circuits. Just something off beat for the sim guys here.

In regards to cascoding, as used here.... of all the combo's of fet/bipolar, fet/fet or bipolar/fet, bipol/bipolar -- the fet with bipolar cascode does the better job. Comments? Thx - RNM

Last edited by RNMarsh; 24th October 2012 at 09:32 AM.
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Old 24th October 2012, 10:03 AM   #1874
RNMarsh is offline RNMarsh  United States
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Default things for the sim guys

Quote:
Originally Posted by RNMarsh View Post
Your experience is exactly the same as mine. In fact, I could fine tune the cancellation to a null-once I was close - by adjusting the supply voltage. So, yes, a stable ps voltage is required. Its a first order cancellation that for a high gain input stage could open its bandwidth and help lower thd at the high end for gnfb circuits. Just something off beat for the sim guys here.
You should be able to see this cancellation affect in sim if your models are really good.

Another to see how the sim does is with neutralization.... an old trick is to put back biased diodes -- made from the same devices as the diff pair -- from base to opposite collector. This has the added benefit of varying the c with signal voltage for better results. Can compare to cascode

[In either case, reducing the effective C not only extends Bw but by reducing the range of C variation with voltage, some distortion reduction can be seen.]

Something for the sim guys... may have appl in other designs they make.

Last edited by RNMarsh; 24th October 2012 at 10:28 AM.
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Old 24th October 2012, 10:26 AM   #1875
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The way the cascode is made might be more important than what semis are used. Attached is a cascode evaluation made by Stinius.


/S


Quote:
Originally Posted by RNMarsh View Post
In regards to cascoding, as used here.... of all the combo's of fet/bipolar, fet/fet or bipolar/fet, bipol/bipolar -- the fet with bipolar cascode does the better job. Comments? Thx - RNM
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Old 24th October 2012, 10:49 AM   #1876
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Quote:
Originally Posted by RNMarsh View Post
You should be able to see this cancellation affect in sim if your models are really good.

Another to see how the sim does is with neutralization.... an old trick is to put back biased diodes -- made from the same devices as the diff pair -- from base to opposite collector. This has the added benefit of varying the c with signal voltage for better results. Can compare to cascode

[In either case, reducing the effective C not only extends Bw but by reducing the range of C variation with voltage, some distortion reduction can be seen.]

Something for the sim guys... may have appl in other designs they make.
It only works if the inputs are symmetrical which is not the case with the common input LTPs, thus it will degrade performance.

This affect can indeed be seen with sim when the above criteria is met.
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Old 24th October 2012, 12:28 PM   #1877
RNMarsh is offline RNMarsh  United States
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What about the effects of cascoding on PSRR ? Who showed the best topology for those parameters?

When designs are not mainly focused on lowest distortion, I find that the improvment to PSR to make an audible different in power amps with unreg supplies. I have cascoded compl/diff input designs with already very low thd and found audible improvement.... I attributed it to improved psrr. Thx-RNM

Last edited by RNMarsh; 24th October 2012 at 12:38 PM.
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Old 24th October 2012, 02:31 PM   #1878
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Quote:
Originally Posted by fas42 View Post
For people's information, I just tried the model of the BF862 that's being used in LTspice, and it does add a gentle curve, slope decreasing towards zero gate voltage, to the transconductance characteristic; a simple, minimal spec'd set of parameters for a JFET just traces a straight line, otherwise.

Frank
SPICE 3 includes a fitting parameter B from the Parker and Skellern model, but all the JFET's I see just use the same default value. I don't know if this is enough since I found several articles that needed to modify their model to fit distortion performance of real amplifiers. Time to get out the BF862 datasheet and experiment.
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Last edited by scott wurcer; 24th October 2012 at 02:34 PM.
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Old 24th October 2012, 02:37 PM   #1879
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Quote:
Originally Posted by Nelson Pass View Post
An argument for cascoding?

That helps in any case, but it would be fun if a simulation could catch the load line tweaks.
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Old 24th October 2012, 03:04 PM   #1880
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jfets as cascode devices has an impedance advantage over bipolars... so while capacitance is lower with bipolar the impedance is also lower, so the current swing over rail resistors add more distortion due to waring drive current. each type has their over benefits in cascoding
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