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Old 15th October 2012, 05:48 PM   #1711
bcarso is offline bcarso  United States
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Originally Posted by Waly View Post
If you are not targeting the ultimate noise, here's a little gem from the former Sanyo (currently Onsemi) I've successfully used. About 3nV/rtHz noise (measured) and low Ciss. And an easy to solder SMD package.

Available for pennies at Digikey.
Thanks for that. I am curious at what operating point and frequencies you measured the 3nV/sqrtHz. Was it at 10Hz?

Though it is hardly awful, there must be some rather significant parasitic resistances or other problems in this part for the performance to be this bad. If it behaved like an ideal JFET according to the first-order van der Ziel theory, with the transconductance at 1mA shown on the datasheet as about 12mS the voltage noise density would be about 960pV/sqrtHz. Yet their curves and spec for noise figure indicate it is more like 2.1nV/sqrtHz, with your measurements even worse.

And there are other head-scratching issues on the datasheet. With essentially all of the noise coming from thermal channel noise and no parallel noise, how can the noise figure not improve markedly with higher source resistance? Yet the graph (second down on the left on page 4) shows it flat out to a megohm! Ludicrous --- the part would have to somehow adjust e sub n upwards as the source resistance rose.

Conjecture: something was lost in translation, and perhaps that graph should be labeled as noise voltage spectral density? This would be realistic and reconcile well with the transconductance at the specified 1mA, although the rise at 100 ohms on the left is then unaccountable. Actually if we replace the occurrences of "NF" and "dB" with noise spectral density in both graphs about noise on that page, things about make sense. The 3dB at 10Hz for the upper right-hand graph revised as 3nV/sqrtHz would be a fine number. I think someone failed to properly translate here.

So this part may be about as good as a BF862 after all, unless something else is going on. Worth giving it a try. It does have nice low capacitance. I'll get some Or maybe the JFET alone at least.

Thanks again! One can never have enough options. Long live AM radio!
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Old 15th October 2012, 05:55 PM   #1712
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We might be getting carried away with these thermal issues. A simple potting in the right stuff might be enough.

Diamond filled epoxy?
I used to kid a machinist that I hoped he could make portions of the detector and preamp front end housing out of diamond. He was a little nervous as it was, looking forward to a peaceful retirement, and it didn't help when I learned to mimic the whistling of a professor who was frequently changing his mind about what he wanted done. I got called on the carpet by that professor when it came out.
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Old 15th October 2012, 06:15 PM   #1713
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Originally Posted by scott wurcer View Post
We might be getting carried away with these thermal issues. A simple potting in the right stuff might be enough.

Diamond filled epoxy?
Extend the dissipating pads in all directions on the board. Collectors, gates..resistors.

Use a solder mask at silk screening both for part identification as well as a positive stop of the solder during reflow. Epoxies will not bond well to solders, but will so to copper. The downside would be if you use a honkin ground plane, the capacitance would go up for each node. The upside would be you could thermal epoxy the backside to an aluminum spreader.

Emerson Cuming 2850 FT with catalyst #23LV. It cures at room temp making it easy, and it's glass transition temperature is 68 degrees C. I don't expect operation to be that high.

The TCE of 2850 FT will be about 29 ppm/degree C. The circuit board is small enough that it'll survive liquid nitrogen dunks.

It's alumina filled, the diamond filler doesn't provide enough advantage to make it worth it, as you can't overload the mix lest you go dry.

cheers, jn
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Old 15th October 2012, 06:59 PM   #1714
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First I would try to layout the four JFET's cross coupled style in a tight square and put a little stick-on heat sink there, use duals for the current mirrors, and I bet you will never see any problems.
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Old 15th October 2012, 07:07 PM   #1715
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Originally Posted by scott wurcer View Post
First I would try to layout the four JFET's cross coupled style in a tight square and put a little stick-on heat sink there, use duals for the current mirrors, and I bet you will never see any problems.
I'm confident you are correct. But, where's the fun in that??

jn
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Old 15th October 2012, 07:20 PM   #1716
bcarso is offline bcarso  United States
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I'm confident you are correct. But, where's the fun in that??

jn
I must say that testing them (BF862) yesterday I was much impressed by the stability within a few seconds of the drain current. Some of them have a very close-to-zero tempco for the conditions of the test, Idss at 4V Vds. At lower currents they will probably all have a positive tempco of drain current; some of the higher Idss ones had a slight negative tempco.

I'm tempted to use these in other circuits with near-zero-TC current sources and not necessarily JFETs, let alone matched ones. Such I sources can have lower noise and make the equivalent input voltage noise be strongly dominated by the BF862 alone. As long as the voltage rate-of-change at the gate is not too gigantic there should be little disadvantage to Idss operation, i.e., no loss of current to forward gate conduction.
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Old 15th October 2012, 08:40 PM   #1717
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Simple question. The thermal issue is:

A) about parameter drift with temperature causing increased distortion
B) noise

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Old 15th October 2012, 09:19 PM   #1718
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Simple question. The thermal issue is:

A) about parameter drift with temperature causing increased distortion
B) noise

_-_-bear
There's a concern about d.c. drift due to ambient changes for closed loop gains on the high side. Not distortion per se, but one of those opamp parameters. For audio the fallback is a d.c. blocking capacitor in the feedback divider resistor, but these are looked at askance by many. And even if a d.c. servo is employed somewhere, the less work it has to do, the better.

I worry about self-heating shifts sometimes, local to the given device, which if they are rapid enough can be another distortion mechanism. Even with unrealistically symmetrical stimuli one can sometimes see evidence of these as an increase in distortions at low frequencies --- particularly in the presence of large common-mode swings. The cascoding of the input devices will have helped this a lot for the circuit considered. That, combined with high loop gain and low tempco JFETs, will render these sorts of concerns small.

Less-local effects: in monolithic parts the chip layout is done with much attention paid to symmetry, so that output stage temperature changes couple equally to the sensitive input devices. One of the benefits of discrete component circuits is being able to put a little distance between the high-diss parts and the input devices, although as we shrink things the thermal coupling should not be assumed negligible. At least the time constants are pretty long, so drift (infrasonic changes) will be the more likely effect than sonic distortions.

Noise is usually a weak-enough function of device absolute temperature that the effect can be mostly ignored. Exceptions include very-high-impedance circuits and high-temp gate leakages, the latter roughly doubling for each 10-12 degrees increase around room temperatures. If we were really pushing the dissipation in the 862s this might be a noise effect, but again the better question is why we would be using such high impedances. And in apps where high Z is mandatory, like condenser capsule preamps, as Scott has pointed out in his LA articles, we don't gain that much anyway pushing noise down with increased currents (a roughly 1/4 power of drain current reduction), and we will certainly eat batteries faster.
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Old 15th October 2012, 09:31 PM   #1719
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Originally Posted by bcarso View Post
Thanks for that. I am curious at what operating point and frequencies you measured the 3nV/sqrtHz. Was it at 10Hz?

Though it is hardly awful, there must be some rather significant parasitic resistances or other problems in this part for the performance to be this bad. If it behaved like an ideal JFET according to the first-order van der Ziel theory, with the transconductance at 1mA shown on the datasheet as about 12mS the voltage noise density would be about 960pV/sqrtHz. Yet their curves and spec for noise figure indicate it is more like 2.1nV/sqrtHz, with your measurements even worse.

And there are other head-scratching issues on the datasheet. With essentially all of the noise coming from thermal channel noise and no parallel noise, how can the noise figure not improve markedly with higher source resistance? Yet the graph (second down on the left on page 4) shows it flat out to a megohm! Ludicrous --- the part would have to somehow adjust e sub n upwards as the source resistance rose.

Conjecture: something was lost in translation, and perhaps that graph should be labeled as noise voltage spectral density? This would be realistic and reconcile well with the transconductance at the specified 1mA, although the rise at 100 ohms on the left is then unaccountable. Actually if we replace the occurrences of "NF" and "dB" with noise spectral density in both graphs about noise on that page, things about make sense. The 3dB at 10Hz for the upper right-hand graph revised as 3nV/sqrtHz would be a fine number. I think someone failed to properly translate here.

So this part may be about as good as a BF862 after all, unless something else is going on. Worth giving it a try. It does have nice low capacitance. I'll get some Or maybe the JFET alone at least.

Thanks again! One can never have enough options. Long live AM radio!
Measurement was at 1KHz.

The big problem with this device is power dissipation. If you keep the JFET around Idss, Vce of the cascode device should be under 10V. ~100mW is all this SMD case can take. The Vcemax of 50V is pretty much useless.

Devices from the same tube (I got 100 pcs and fed my whole class) are matched to +/- 10%, so a cascoded LTP is feasible. I've built a discrete opamp with these devices in the input stage, 18 more transistors and 0402 RC's (everything hand soldered) in less than .25 sq. in.

Edit: 1KHz and about 12mA (that is, Idss)

Last edited by Waly; 15th October 2012 at 09:38 PM.
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Old 15th October 2012, 09:46 PM   #1720
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Granted I will match the BF862 jfets as carefully as I can but why can't there be a dc balance tweek up front around that diff amp. Is that too much of a trade off or it it just taboo noise wise? There could be test points on the output of the diffamp and measured with a floating meter then tweeked for lowest dc offset. But I guess that wouldn't take into consideration the imbalance of the rest of the components. I'm not an EE just a retired architect and audiophile and I will wait for guidance from you gurus. I do believe that the smaller you make something, the worse it sounds. The proof is in the listening. Why are recording studios buying Rupert Neve 1073 modules from 1970 and swearing by them and everything in them is all npn, all Class A and if I should show you guys the schematic, you would laugh! Ray
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