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Old 17th September 2012, 04:22 AM   #991
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Quote:
Originally Posted by counter culture View Post
linuxguru

I think there's something wrong with your sim.
Yup, known LTSpice artefacts from a quick-and-dirty 5-cycle transient simulation and Hann window. Not really a problem for getting a rough idea of the relative harmonics.
BTW, I changed the upper cascodes to BF822/823, Miller caps to 10 pF and output NPN to 2sc945. Added 22k to ground at high-Z gain node, as suggested by Scott. GBW is up to 48 MHz, so all is well.
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you can get these transistors for $0.03 ea.
Except the NJFs, all of my transistors run to maybe 5c each.
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Old 17th September 2012, 07:55 AM   #992
bcarso is offline bcarso  United States
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Quote:
Originally Posted by linuxguru View Post
Yup, known LTSpice artefacts from a quick-and-dirty 5-cycle transient simulation and Hann window. Not really a problem for getting a rough idea of the relative harmonics.
BTW, I changed the upper cascodes to BF822/823, Miller caps to 10 pF and output NPN to 2sc945. Added 22k to ground at high-Z gain node, as suggested by Scott. GBW is up to 48 MHz, so all is well.
Of possible interest: the sim results for a perfect buffer compared to the one shown.
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Old 17th September 2012, 02:16 PM   #993
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Originally Posted by coluke View Post
A trick I used when playing with discrete CFA, but it seems a purely cosmetic effect, isn't it? Once OLG @ 20 kHz is fixed, I think there's no point in deliberately lowering it at LF just to get a flat OLBW - 120 dB @50 Hz and 70 dB @ 20 kHz is better than 70 dB from 50 Hz up to 20 kHz...

L.
You must have missed the controversy, some claim otherwise.
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Old 17th September 2012, 02:22 PM   #994
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Quote:
Originally Posted by linuxguru View Post
Yup, known LTSpice artefacts from a quick-and-dirty 5-cycle transient simulation and Hann window. Not really a problem for getting a rough idea of the relative harmonics.
BTW, I changed the upper cascodes to BF822/823, Miller caps to 10 pF and output NPN to 2sc945. Added 22k to ground at high-Z gain node, as suggested by Scott. GBW is up to 48 MHz, so all is well.


Except the NJFs, all of my transistors run to maybe 5c each.
The 22K to ground was a nod to those that think 20KHz open-loop BW improves things, what I'm not sure. This should probably be left for listening experiments.
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Old 17th September 2012, 02:28 PM   #995
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Yes Dimitri, that's it. There is a full schematic in Cobbold's book from George's paper. Some real funky old school tricks to use only one flavor of device.
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Old 17th September 2012, 02:50 PM   #996
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Originally Posted by scott wurcer View Post
The 22K to ground was a nod to those that think 20KHz open-loop BW improves things, what I'm not sure. This should probably be left for listening experiments.
If I build a PCB, I'll bring the gain-node out to pin 8 as external compensation, assuming it's a single DIP8 implementation. Added bonus: people can use their favourite buffer and bypass the default internal buffer if they wish. The only hitch is additional track parasitics at what looks to be a critical high-Z node.
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Old 17th September 2012, 03:45 PM   #997
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The old idea that a wide open loop bandwidth is a good thing got started way back when slew rate and TIM was the raging discussion and has lingered on in audio-lure as a design criteria. Some people think it sounds better that way.

So, if you do a pcb of Scott's circuit then you can compare - with the same exact circuit is best - low-medium and high gnfb by changing one resistor (maybe a pot or switch selectable) and then you can listen. That was one of my intents to try for.... To be able to listen to circuits - but all with super low thd -with various levels of gnfb. That should clear up the issue once and for all, don't you think? Thx - RNM

Last edited by RNMarsh; 17th September 2012 at 03:58 PM.
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Old 17th September 2012, 03:55 PM   #998
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Originally Posted by scott wurcer View Post
Some real funky old school tricks to use only one flavor of device.
Aren't those p-channel FET's?

Thanks,
Chris
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Old 17th September 2012, 04:12 PM   #999
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Aren't those p-channel FET's?

Thanks,
Chris
Yes, as one does when fabricating JFETs alongside NPNs.

There are no PNPs to be seen on the full schematics. Maybe I will scan the section and post, since the book is long out of print. The discussion is good too.
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Old 17th September 2012, 04:25 PM   #1000
RNMarsh is offline RNMarsh  United States
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Aren't those p-channel FET's?

Thanks,
Chris
yes. P-channel. All npn bjt. [Fig 10.29, pg 395]

Last edited by RNMarsh; 17th September 2012 at 04:29 PM.
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