Optimum value for R(s) in a JFET follower? - diyAudio
Go Back   Home > Forums > Source & Line > Analog Line Level

Analog Line Level Preamplifiers , Passive Pre-amps, Crossovers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 17th May 2012, 02:55 PM   #1
diyAudio Member
 
Join Date: Dec 2009
Default Optimum value for R(s) in a JFET follower?

I want to build an n-ch-jfet voltage follower, which I intend to use as a buffer with high-impedance sources, but i'm not sure how to determine the value of the resistor between source and ground. I'm using a 9V supply (form a battery) and a 2sk170 n-channel jfet. On which of the transistor's parameter does that resistance depend?
  Reply With Quote
Old 18th May 2012, 02:09 AM   #2
diyAudio Member
 
Chris Hornbeck's Avatar
 
Join Date: May 2011
Location: Little Rock
If you can stretch your project to two batteries, giving you both polarities of power supply, you can direct couple the input and still have a fairly large range of operation. In this case the resistor is chosen to give your desired idle current. Without knowing anything else about your requirements, a general recommendation would be a current "somewhat" less than I-sub-dss.

2SK170's come color coded for I-sub-dss and a number near the bottom of that range is usually safe. For example, maybe about 3mA for greens (2.6 thru 6.5mA or something like that), so about 3K Ohm from -9V.

All good fortune,
Chris
  Reply With Quote
Old 18th May 2012, 02:14 AM   #3
diyAudio Member
 
Chris Hornbeck's Avatar
 
Join Date: May 2011
Location: Little Rock
A more general answer is that best linearity and lowest noise both occur at highest idle currents, but peak positive signal swing shouldn't drive the gate into forward conduction (too much...). So your choice will depend on the device's I-sub-dss and on the circuit's expected loading.

Chris
  Reply With Quote
Old 18th May 2012, 02:52 AM   #4
Simon B is offline Simon B  United Kingdom
diyAudio Member
 
Join Date: Dec 2011
Location: North-East England
Quote:
Originally Posted by ribolovec2 View Post
I want to build an n-ch-jfet voltage follower, which I intend to use as a buffer with high-impedance sources, but i'm not sure how to determine the value of the resistor between source and ground. I'm using a 9V supply (form a battery) and a 2sk170 n-channel jfet. On which of the transistor's parameter does that resistance depend?

What's the biggest input signal you need to deal with - pk-to-pk?

What following input impedance will the buffer be driving & how long a connecting lead?

Must it be just a single fet source follower, or is adding a bjt or two permitted?

Is there any reason you might need direct coupling? Given that it's a high Z-in buffer, input capacitor can be low value.

No need to guess the Idss of your devices, presuming you've got a meter as well as that 9v battery, and the Idss/4, Vp/2 method for Vp is easy too.
__________________
Engineer: One who can do for 10 shillings what any fool can do for 10 pounds.

Last edited by Simon B; 18th May 2012 at 02:57 AM.
  Reply With Quote
Old 18th May 2012, 10:46 PM   #5
diyAudio Member
 
Join Date: Dec 2009
Well, I don't think it would be possible to use 2 9volt batteries, but i'm using a resistor divider virtual ground, which in effect gives +- 4.5V. I measured the Idss and Vp of the particular transistor that I bought and their values are:
Idss=8mA Vp = -0.495V (which as far as I understoos is another name for Vgs(off) ? ) The buffer accepts a signal directly from an electric guitar, and the amplitude of the signal varies wildly with different kinds of guitars; I don't even know what should I consider for a reference 'normal' electric guitar signal. Maybe something in the range of 1V pk-to-pk should cover most cases? This buffer is a part of another device, so the connection lead is very short (inside the enclosure). The impedance of the next stage is , say, 50k to 100k, which although seemingly high , can be low for a guitar output. There's no condition that a BJT can't follow the JFET buffer, but I don't know if making such a complicated buffer is justified.
  Reply With Quote
Old 18th May 2012, 11:19 PM   #6
Simon B is offline Simon B  United Kingdom
diyAudio Member
 
Join Date: Dec 2011
Location: North-East England
With such a very small Vp the 4.5v virtual ground is a good idea, means you can swing your likely input signal ok.

Gate of fet connected to 4.5v virtual ground via high value resistor, eg 1M. Drain to +9v. Vd will be roughly 4.7v, varying only a little with Rs.

With the gate connected to the virtual ground things are much easier than without it. Rs = 2k2 should give Id about 2mA, about 300 hours battery life, try higher and lower values, the highest value that still sounds good gives you longest battery life.

__________________
Engineer: One who can do for 10 shillings what any fool can do for 10 pounds.
  Reply With Quote
Old 19th May 2012, 08:13 AM   #7
diyAudio Member
 
Join Date: Dec 2009
Thanks, I'll experiment a little and then share what I'll have observed.
  Reply With Quote
Old 19th May 2012, 11:55 AM   #8
Simon B is offline Simon B  United Kingdom
diyAudio Member
 
Join Date: Dec 2011
Location: North-East England
No, thank you. The virtual ground idea is one that will be immediately useful to me. It somehow felt counter-intuitive for a moment, but it looks a good way of using fets for voltage followers with a signal oto or bigger than Vp whilst substantially reducing distortion.


__________________
Engineer: One who can do for 10 shillings what any fool can do for 10 pounds.
  Reply With Quote
Old 19th May 2012, 02:21 PM   #9
AndrewT is offline AndrewT  Scotland
diyAudio Member
 
Join Date: Jul 2004
Location: Scottish Borders
The jFET can operate well when biased to the range 70% of Idss to 100% of Idss.

The B1 is an example of biasing to 100% of Idss.

The source resistor can be set from 0r0 to a few ohms.

Look up the Dennis Feucht paper on biasing jFET amplifiers.
analogZONE Columnist Dennis Feucht: Buffer Amplifier Design
__________________
regards Andrew T.
  Reply With Quote
Old 19th May 2012, 08:05 PM   #10
Simon B is offline Simon B  United Kingdom
diyAudio Member
 
Join Date: Dec 2011
Location: North-East England
I'll reveal myself as an audio-ignoramus par excellence by admitting that I have no idea what a B-1 might be, apart from a rather scary aeroplane. There's interesting info in the paper that Andrew links to about getting a low temperature coefficient operating point, though this might not be such a priority for this thread's OP, assuming a coupling capacitor between the buffer and the following amp, with its 50k to 100k z-in.

Posting in the Analog Line Level section will elicit replies concerned particularly oriented towards very low distortion, which might not be such a big concern for guitar use. Operation from a single PP3 probably usually makes current consumption a significant consideration, though in a recent similar thread the OP was quite happy to reduce his battery life by at least 80% to have an LED 'on' indicator!

Another paper worth a look is:

Siliconix Application Note AN-102 - JFET Biasing Techniques

which almost shows the virtual ground technique that I think ribolovec2 intends using, just without a cap to ground from the midpoint of the divider chain.

This is interesting too:
Quote:
Originally Posted by Chris Hornbeck View Post
...best linearity and lowest noise both occur at highest idle currents, but peak positive signal swing shouldn't drive the gate into forward conduction (too much...).
Given that FET inputs are generally used with hi-z sources, what on earth happens to linearity when the gate's forward biased enough to conduct? I'm passing this one over to the distortion pedal boys in Instruments and Amps, to further expand the already enormous range of ways of mangling a guitar signal!

I wish this forum had been around when I was first studying this stuff 40 years ago, it would've made it so much more fun!
__________________
Engineer: One who can do for 10 shillings what any fool can do for 10 pounds.

Last edited by Simon B; 19th May 2012 at 08:07 PM.
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
JFET follower (Xenover) with MOX like setup? NYCOne Analog Line Level 2 10th September 2011 04:04 AM
optimum load for mosfet source follower? AudioGeek Solid State 2 11th February 2006 07:45 PM
how to determine optimum load for source follower?? AudioGeek Solid State 0 22nd January 2005 07:27 PM
Anyone tried a JFET source follower at the input of a BOZ? G Pass Labs 0 10th July 2004 04:11 PM
Simple amp design JFET and follower RichJones Solid State 9 8th September 2003 02:24 PM


New To Site? Need Help?

All times are GMT. The time now is 12:22 PM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright 1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2