How to derermine the optimum bias resistor value ?

[ribolovec2]

Hello,
I've got a question concerning the biasing of a non-inverting op amp, In my schematic I have a voltage reference point at 1/2 of the supply voltage. What value of the biasing resistor will give me the best noise and overall performance for a certain op amp. What specifications of the op amp should be taken into account and in what way do they define the best biasing resistor value? And what is the approach when biasing an emitter follower to the same voltage reference point?

[Mooly]

Best if you draw it.

Non inverting means you are biasing the input the signal will be applied to and so the impedance of the bias resistor/network has to be considered.

Another consideration is whether the opamp is FET or Bjt as the Bjt (if it is say a 5532) will draw current from the bias network. The FET type won't.

An emitter follower give a low impedance reference (not always needed) and so you have to choose an appropriate bias resistor to be part of the required input impedance.

What are you trying to do ? and what opamp are you using.

[DF96]

As the voltage reference point will presumably be AC bypassed the resistance values won't have much effect on noise.

[ribolovec2]

I've drawn it. I was asking what determines the value of R-bias (on the schematic) when the designer wants to optimize overall performance (noise, stability, distortion etc) ? In my case, it isn't a buffer, so the input impedance (determined mainly by R-bias) doesn't need to be high at all cost. I just want to get the best performance out of an op amp.

[DF96]

R-bias will generate thermal noise, but the source may attenuate this. You will need to provide any input bias current needed by the opamp, as Mooly says.

The values of the feedback resistors may have a greater effect on the opamp performance.

[wahab]

R bias must be such that its value in serial with either R3 or R4 will
be equal to R2 , assuming R3 = R4.

If the op amp has BJT NPN input differential , the biasing current
will be drained through R3 , while it will be drained from R4 if it has
BJT PNP input differential.

With a bipolar inputs op amp , the biaising current is low ,
typicaly 200nA for a NE5532/5534 , yet, the current through
the voltage divider R3/R4 must have a significantly higher value,
about one hundreds time more at least.

As pointed by Mooly , this is not the case with fet inputs op amps.

[ribolovec2]

And what happens with FET-input op amp?

[DF96]

JFET input opamps have such low input current that you can ignore it.

For BJT input amps you want R-bias+(R3+R4)/2 = R2 for minimum offset due to input current. However, as the offset is likely to be much smaller than errors in R3 and R4, it doesn't really matter unless you are running other opamps from the same reference point.

You still haven't told us what you are trying to achieve.

[ribolovec2]

Well, it was more of a theoretical question, rather than anything in particular. Thank you all for the responses, it was really helpful. One last question, though: If biasing a bipolar transistor (emitter follower configuration) through its own R-bias to the ground reference point, what is a good value for R-bias. How does it depend upon the gain of the transistor and its load?

[DF96]

What do you know about emitters followers?