I have a question about the cap or caps for 0.22uF/100uF here is it using any one of those capacitors or using both in parallel? or we have to use only one?
Its optional about either 0.22uF film capacitor (even higher value film if fitting and liked) or 100uF electrolytic by the user's own subjective choice
There will be self dissipation issues even when used in the PSUs as I wrote. All run at IDSS there and four out of six have high enough voltage across themselves to overheat. If not chancing enough IDSS so to be readily self-destroyed, the long time reliability will surely suffer at least. Prefer GR range IDSS in Japanese compatibles. BF862 mostly show circa 15mA IDSS. Also prone to oscillation sometimes needing either gate resistors or mini inductors. Good FETS but not as drop ins without specific circuitry and PCB design.
in general what is the dissipation is safe in that tiny package?
I have another question that what is the large black resistor just beside the silmic capacitor( i mean its not there in the sch ) what is the role of that resistor?
http://cdn.head-fi.org/a/a2/a2c32a86_hotrodDCB1duoweb.jpg
Last edited:
Without gate lead copper platform pad I would not design above 50mW for it assuming good long term reliability.
Someone must have used thick 1 Ohm vref tail current indicator resistors for no dissipation reason originally specified. Maybe he had some already or just liked the looks and quality almost matching the main current setting ones.
Someone must have used thick 1 Ohm vref tail current indicator resistors for no dissipation reason originally specified. Maybe he had some already or just liked the looks and quality almost matching the main current setting ones.
salas I already have a capacitor bank on an external pcb so can I directly take the output from the capacitors and wire to the dcb1 pcb? would there be any problem with the wire inductance or any other parasitics?
can I use the output from the pcb for psu application for longer lengths of the wire to connect to the various channels? does the length affects by any chance? consider one channel is connected right beside it like as much as 15cm and other at 50cm will that be fine?
can I use the output from the pcb for psu application for longer lengths of the wire to connect to the various channels? does the length affects by any chance? consider one channel is connected right beside it like as much as 15cm and other at 50cm will that be fine?
Last edited:
I haven't measured it on any other PSU configuration than what's on the standard PCBs, i.e. not with extra wires or other modifications, so I can't predict about possible side effects or not.
I generally prefer to long term use any steadily dissipating semiconductor (running on constant current) at no more than 1/3 its stated DC SOA max as seen in its datasheet power curves when in-box ambient, sinking area, and thermal transfer losses, are all considered of course. There is no single answer in thermal planning. Follow detailed guides or application notes free floating on the web about thermal design.
I generally prefer to long term use any steadily dissipating semiconductor (running on constant current) at no more than 1/3 its stated DC SOA max as seen in its datasheet power curves when in-box ambient, sinking area, and thermal transfer losses, are all considered of course. There is no single answer in thermal planning. Follow detailed guides or application notes free floating on the web about thermal design.
I haven't measured it on any other PSU configuration than what's on the standard PCBs, i.e. not with extra wires or other modifications, so I can't predict about possible side effects or not.
I generally prefer to long term use any steadily dissipating semiconductor (running on constant current) at no more than 1/3 its stated DC SOA max as seen in its datasheet power curves when in-box ambient, sinking area, and thermal transfer losses, are all considered of course. There is no single answer in thermal planning. Follow detailed guides or application notes free floating on the web about thermal design.
I have one strange situation: I have seen people writing reviews about silmic 2 caps and what I did is I bought 100 units of the 100/35V thinking that even this might one day go out of production as black gate but its still there in production.
Now what is the wired thing In my observations is that I have used silmic 2 in various locations like decoupling and parallel in power supply various values like 100uf/35v 100uf/100v 220uf/100v 2.2uf/50v 22uf/50v and burned for till 500 hours. Just cant believe that they sound very muffled even after burning for extensive periods of time.
The reason why I bought smaller values is just to reduce the dosage. Expecting it might make better difference but even the smaller values are robbing the details.
I have tried all these with lme49810, 811 chip even I have tried using either for the chip and output stage both in n number of combinations but i was never happy using them something they sound kinda dull.
I even tried using mix match with cerafine , finegold , muse etc etc etc.. but no silmic 2 never gave me the right mids as what audiophiles wrote over the forum.
Is there anything that Im doing wrong with these?
Read once that Nelson pass said to try these they sound great as he uses for input coupling and psu decoupling. I tried but even then it didnt sound great.
But i have a question now is im planning to use silmic 2 in the dcb1 hot rod pcb now I have a question that where do I need to place these caps? I like its tonality but its too much taking control / over dosage of its signature which i need only 10% of what its doing. Im loosing the details.
Use the 330s as input signal gate resistors (at the two outer sides 220 Ohm original positions)
Than'x
Thanks to the questions by Chromenuts I've now understood what sets the impedance that an external source, such as a DAC, sees - it's the value of the Potentiometer. Blindingly obvious now, as most simple things are when explained properly.
I also now understand what the Pot sees as the load (the 220K resistor), again blindingly obvious now.
However, how is the output impedence set for the buffer section itself - is it the 220 ohm resistor that comes after the pairs of Sk170's in the buffer circuit? If not, how is the output impedence calculated?
I also now understand what the Pot sees as the load (the 220K resistor), again blindingly obvious now.
However, how is the output impedence set for the buffer section itself - is it the 220 ohm resistor that comes after the pairs of Sk170's in the buffer circuit? If not, how is the output impedence calculated?
Its the RDS value of a K170BL (35-50 Ohm) + the 220 Ohm resistor. If it was a high current bias & near zero output impedance buffer we would not be able to keep its output shorted to ground without heating its JFETs to a fault before the relay clicks for instance. It would bring down the full available current from its own rails. Like a shorted power amp would. Its a nice little buffer really good for most sane hi-fi drive jobs in its minimum signal path junctions design simplicity, single stage self feedback goodness and nice THD profile, but not a monster buffer. It can't even drive headphones for example.
That is a most apt phrase that so describes the electrical limitations of Buffers and many other circuits.............. Ballerinas can't be weight lifters.
I am up in the hills and with the slope I cannot flood.
Carlisle is way down on the West side of North England and has been particularly badly hit.
I don't know the details but the 340mm of rainfall in 24hours is a new UK record. I suspect that is way above a 100year flood level.
I did a bit of hydraulics at University and I cannot understand why the Planners and housing developers can get it so wrong ! I used to design for 1.5"/hour on the East coast and 2"/hour on the West coast for sites in my area. There was little point in designing for more. The community drains that are our outfall would be at, or above, maximum capacity.
One simple rule that would not cost a lot.
Planning Application comes in to build 100 houses on the flood plain.
Planners approve with the condition that all the "expensive inhabitable" accomdation be upstairs. The ground floor (garage/utility room and no drains) shall be built from flood recovery materials (no plaster and no timber, etc.) and all services that can be affected, be located higher than the 500year flood level.
Or
Build the lowest level of accomodation up on brickwork to above the 500year flood level.
I looked at a house plot for sale in the Borders and noticed that the Galawater was nearby. I took a walk and found the parks gardener. He told me "it floods up to about those houses over there most years". Thanks and walked away to compare the house plot to that regular flood level.
Now I see a developer has built 3 houses and each are only about 2' above that alledged flood level. Those 3 houses are at risk. Yet the Planners could have stopped that at almost no cost.
Carlisle is way down on the West side of North England and has been particularly badly hit.
I don't know the details but the 340mm of rainfall in 24hours is a new UK record. I suspect that is way above a 100year flood level.
I did a bit of hydraulics at University and I cannot understand why the Planners and housing developers can get it so wrong ! I used to design for 1.5"/hour on the East coast and 2"/hour on the West coast for sites in my area. There was little point in designing for more. The community drains that are our outfall would be at, or above, maximum capacity.
One simple rule that would not cost a lot.
Planning Application comes in to build 100 houses on the flood plain.
Planners approve with the condition that all the "expensive inhabitable" accomdation be upstairs. The ground floor (garage/utility room and no drains) shall be built from flood recovery materials (no plaster and no timber, etc.) and all services that can be affected, be located higher than the 500year flood level.
Or
Build the lowest level of accomodation up on brickwork to above the 500year flood level.
I looked at a house plot for sale in the Borders and noticed that the Galawater was nearby. I took a walk and found the parks gardener. He told me "it floods up to about those houses over there most years". Thanks and walked away to compare the house plot to that regular flood level.
Now I see a developer has built 3 houses and each are only about 2' above that alledged flood level. Those 3 houses are at risk. Yet the Planners could have stopped that at almost no cost.
Last edited:
- Home
- Source & Line
- Analog Line Level
- Salas hotrodded blue DCB1 build