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Old 19th March 2010, 05:33 AM   #1
kp93300 is offline kp93300  Malaysia
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Default simple pre with offset problem

I build this circuit contributed by a fellow forum member.
I am unable to trim the dc offset to zero.
Both channels show 0.1 V dc output.
It sound very good with a output cap .
What is the solution?
Do i need to match the vgs ? can a 50R trimmer solve the problem and change the sound character?
Thanks

kp93300
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Old 19th March 2010, 06:00 AM   #2
Bonsai is offline Bonsai  Taiwan
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1. You would benefit from matching
2. I dont think a 50 Ohm pot will change the sound character much
3. If you have a scope, make sure it s not oscillating.
4. Note that this circuit will b e susceptible to changes in load, or capacitive loading. Ideally you would want to buffer it.
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Old 19th March 2010, 06:08 AM   #3
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Trimming/matching the regulators might help.I've noticed they tend to vary a bit,and are rarely 12.00V exactly.
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Old 19th March 2010, 12:56 PM   #4
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This circuit should have OK supply rejection, so the regulators are not critical
The p and n channel jfets are not going to be well matched - that is your problem
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Old 19th March 2010, 01:56 PM   #5
Ipanema is offline Ipanema  Malaysia
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Try increase the pot resistance e.g. 100ohms. Higher degeneration reduces mismatch between Pfet and nfet.

Good luck.
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Old 19th March 2010, 09:44 PM   #6
juma is online now juma  Serbia
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Quote:
Originally Posted by kp93300 View Post
I build this circuit contributed by a fellow forum member.
I am unable to trim the dc offset to zero.
Both channels show 0.1 V dc output.
It sound very good with a output cap .
What is the solution?
Do i need to match the vgs ? can a 50R trimmer solve the problem and change the sound character?
Thanks

kp93300
You misslabeled JFETs - Drains and Sources are upside down on your schematic. Sources should be connected to 20R pot and Drains should be connected to power rails.
More than 10 forum member built this preamp and all report offset of couple of mV at most.
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Old 19th March 2010, 10:00 PM   #7
godfrey is offline godfrey  South Africa
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Quote:
Originally Posted by juma View Post
Drains and Sources are upside down on your schematic.
Perhaps they are connected upside down in the circuit too?
That might be causing the problem...
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Old 19th March 2010, 11:47 PM   #8
juma is online now juma  Serbia
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Quote:
Originally Posted by Ipanema View Post
Try increase the pot resistance e.g. 100ohms. Higher degeneration reduces mismatch between Pfet and nfet.
Good luck.
Pot value determines the Id through JFETs. Increasing its' value will lower the Id and that will ruin the preamp as it is.

Quote:
Originally Posted by godfrey View Post
Perhaps they are connected upside down in the circuit too?
That might be causing the problem...
Off course. JFET has the property that Source and Drain are somewhat interchangeable - but not absolutely and not all JFETs. They will work that way, but poorly...
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Old 20th March 2010, 01:53 AM   #9
kp93300 is offline kp93300  Malaysia
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thanks very much for the pointers.
I will troubleshoot based on these lines.
The existing build sounds very good with an Bosch motor run 5 uf output cap.
I use a LDR pot in front and F5 after the pre .
kp93300
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Old 20th March 2010, 02:02 AM   #10
kp93300 is offline kp93300  Malaysia
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By the way, I also removed 1 UF C5 as there is no dc offset from the DAC befroe the pre.
Will this be an issue ?
kp93300
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