Hi Hugh!
The schematic i'm using looks exactly like the one you posted in #1, save for C4 being 15pf in mine. Should we decrease R6 only or R2 as well? I'm thinking R6 only should do it.
Also i'd like to say thanks for taking the time to assist us mere mortals in gaining a better understanding of the circuit.
Cheers,
Kris
The schematic i'm using looks exactly like the one you posted in #1, save for C4 being 15pf in mine. Should we decrease R6 only or R2 as well? I'm thinking R6 only should do it.
Also i'd like to say thanks for taking the time to assist us mere mortals in gaining a better understanding of the circuit.
Cheers,
Kris
Kris,
I have looked over the schematic, we are now exactly on the same page.
Actually, I'd not change R2 or R6. I don't believe either changes would have any effect, and I'm quite sure 1K or 470R for R6 would make any difference to biasing at all. I rechecked the current through T1 and it's only around 3.4mA, and the gate drive is peanuts, only 18pA - mere bagatelle.
Andrew,
I have not used X7R but I've heard they are fine. I have a large inventory of silver mica, so of course I tend to use them through commercial reasons! Thank you for your experience......
Cheers,
Hugh
I have looked over the schematic, we are now exactly on the same page.
Actually, I'd not change R2 or R6. I don't believe either changes would have any effect, and I'm quite sure 1K or 470R for R6 would make any difference to biasing at all. I rechecked the current through T1 and it's only around 3.4mA, and the gate drive is peanuts, only 18pA - mere bagatelle.
Andrew,
I have not used X7R but I've heard they are fine. I have a large inventory of silver mica, so of course I tend to use them through commercial reasons! Thank you for your experience......
Cheers,
Hugh
thanks!
Interesting! what is it that makes the X7R's best for decoupling? ESR?
I'm loving learning more with this build - it seems there's a multitude of details in the simplicity that tease out the end result. Next stop for me is tweaking the bias for the front end jfet... 2/3 of Idss you say?
YES, AS, R8 of 1k2 sets the current through T1, but if you use a jfet with 8mA Idss, you might try reducing it raise it to say 5.5mA. Since the VAS device is a mosfet, there is no gate drive, so the voltage through R8 sets the current by simple Ohms law, I = V/R. You can vary this 1st stage current, and this in turn changes transconductance, hence feedback. In turn, this modifies the harmonic distribution, which gives as 'the sound' we all struggle to describe.
If you do change R8, however, the current through R11 will also be changed, and so the bias, via P2, will need adjustment.
Every change in any area of this schematic will generally change the parameters in other areas, and usually the 'sound' too. This is the fascinating aspect of this, and most other, amplifiers.
HD
Interesting! what is it that makes the X7R's best for decoupling? ESR?
I'm loving learning more with this build - it seems there's a multitude of details in the simplicity that tease out the end result. Next stop for me is tweaking the bias for the front end jfet... 2/3 of Idss you say?
YES, AS, R8 of 1k2 sets the current through T1, but if you use a jfet with 8mA Idss, you might try reducing it raise it to say 5.5mA. Since the VAS device is a mosfet, there is no gate drive, so the voltage through R8 sets the current by simple Ohms law, I = V/R. You can vary this 1st stage current, and this in turn changes transconductance, hence feedback. In turn, this modifies the harmonic distribution, which gives as 'the sound' we all struggle to describe.
If you do change R8, however, the current through R11 will also be changed, and so the bias, via P2, will need adjustment.
Every change in any area of this schematic will generally change the parameters in other areas, and usually the 'sound' too. This is the fascinating aspect of this, and most other, amplifiers.
HD
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X7R seem to have enough ESR and low enough ESL to make for very good local decoupling.
We need low ESL to allow the current reserve to get out fast enough to meet the fast transient demand.
We need high ESR to give just enough resistive damping when capacitors are coupled with inductive traces/leadouts.
We need low ESL to allow the current reserve to get out fast enough to meet the fast transient demand.
We need high ESR to give just enough resistive damping when capacitors are coupled with inductive traces/leadouts.
Whoa.
I was highly confused initially there - I've never seen a post of mine altered on the forum before!
I was playing with the source resistance of the jfet in the sim as a means to tweak the bias and having no success, so I'll have a spin at playing with the drain resistor... I'm sort of wondering if I should swap it for a pot and experiment a lot here!
Again - thanks! I'll get stuck in having a play with the sim and seeing what comes out the other side.
I was highly confused initially there - I've never seen a post of mine altered on the forum before!
I was playing with the source resistance of the jfet in the sim as a means to tweak the bias and having no success, so I'll have a spin at playing with the drain resistor... I'm sort of wondering if I should swap it for a pot and experiment a lot here!
Again - thanks! I'll get stuck in having a play with the sim and seeing what comes out the other side.
Cheers AndrewT - makes sense. I had a quick scan of ebay to see what the costings of these were as well as physical sizing and I can see the appeal. I've ordered a bunch of silver mica parts for this build for now though...
For those of us not familiar with the nomenclature what is a "NP0/C0G" cap exactly? your normal ceramics or something more exotic? Pics online don't necessarily make the difference readily apparent.
For those of us not familiar with the nomenclature what is a "NP0/C0G" cap exactly? your normal ceramics or something more exotic? Pics online don't necessarily make the difference readily apparent.
Ceramics are generally described with a three "alfanumeric" code.
NP0 C0G, X7R, Y5V etc.
If you look up wikipedia under ceramic, you will find what all the codes mean for ONE of the coding systems.
http://en.wikipedia.org/wiki/Ceramic_capacitor
NP0 are very low values only, they have a lowish K value and make excellent audio capacitors. In the "other" coding system they are known as C0G.
NP0 C0G, X7R, Y5V etc.
If you look up wikipedia under ceramic, you will find what all the codes mean for ONE of the coding systems.
http://en.wikipedia.org/wiki/Ceramic_capacitor
NP0 are very low values only, they have a lowish K value and make excellent audio capacitors. In the "other" coding system they are known as C0G.
Hugh said:
So, the BF862, according to the datasheet, is a 10mA typ. Idss part, and empirical testing from devices in the wild seems to suggest they are centered around 16mA Idss, maybe we should shoot for 8-12mA?
Hugh said:
How about a 1K 25 turn trimmer for R8? With the caveat that bias will need to be adjusted via P1(since P2 adjusts offset)? Or did you in fact mean offset and so adjusting P2 is correct. Of course, with any change like this readjustment is necessary, so the question is mostly academic. I plan on putting in the 100K resistor in the "PL" position as suggested by you, i.e at C5, will this still provide the intended benefit assuming we have higher T1 current?
Humbly,
Kris
Hi Kris,
There is an alarming tolerance on jfets. Idss cannot be predicted, only measured.
OTOH, I always shoot for 2/3 Idss for the best linearity in an audio amp first stage.
Your suggestion of a 1K 25T trimmer is fine, but as you suggest these are tetchy values, and I also suggest empirical changes as predication with LTspice can surprise! I try NOT to tie things down under I actually build things and then measure it, at least three or four units, so we get a spread. One of my most frustrations was getting the values of a Vbe multiplier amp for my NAKSA, and the ONLY way to get it right was to make ten of them and measure all of them for spread.
If you put 100K into the PL position you will be completely changing the feedback regime since the loop gain will plummet. In rough terms, the nested fb will pull back open loop to around 100k/47, around 2100 (66dB), which will then deliver a loop gain of (66 - 30) = 36dB, which is rather a bit lower than the standard loop gain.
This is doable, but Greg found that reducing the loop gain had no advantages, BUT, it's an interesting exercise and in fact I provided for this on the pcb.
Have it a go, Kris, and let us know what you think about the results!
Cheers,
Hugh
There is an alarming tolerance on jfets. Idss cannot be predicted, only measured.
OTOH, I always shoot for 2/3 Idss for the best linearity in an audio amp first stage.
Your suggestion of a 1K 25T trimmer is fine, but as you suggest these are tetchy values, and I also suggest empirical changes as predication with LTspice can surprise! I try NOT to tie things down under I actually build things and then measure it, at least three or four units, so we get a spread. One of my most frustrations was getting the values of a Vbe multiplier amp for my NAKSA, and the ONLY way to get it right was to make ten of them and measure all of them for spread.
If you put 100K into the PL position you will be completely changing the feedback regime since the loop gain will plummet. In rough terms, the nested fb will pull back open loop to around 100k/47, around 2100 (66dB), which will then deliver a loop gain of (66 - 30) = 36dB, which is rather a bit lower than the standard loop gain.
This is doable, but Greg found that reducing the loop gain had no advantages, BUT, it's an interesting exercise and in fact I provided for this on the pcb.
Have it a go, Kris, and let us know what you think about the results!
Cheers,
Hugh
annoyingly I just ordered a pile of clearance stuff from Rockby and they have 22pf mica on hand. Doh!- Status
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