Douglas, on page 137 of the fifth edition you state the following:
Would that this were true: alas, the cascode compensation scheme makes the minor loop unstable according to my SPICE simulations. Shunt capacitance (of the order of 1nF) at the transimpedance stage's output to ground is now required to make the minor loop stable.
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As noted above input cascode compensation is unstable giving a phase margin in excess of 200 degrees at unity minor loop gain frequency (green trace) if the minor loop is uncompensated.
It is preferable to compensate the minor loop, if input cascode compensation is used, by shunting the input to the second stage to ground with 2.2nF in series with 4R7. This lag-lead network introduces a pole at a lower frequency, courtesy of the 2.2nF capacitor, which reduces the unity loop gain frequency while the 4R7 resistor introduces a zero in the vicinity of unity loop gain to further enhance stability margins. Phase shift at unity loop gain frequency in this case is only 119 degrees (blue trace)
Capacitively shunting the input to the second stage is preferable to shunting the output of the second stage because the latter compromises the slew rate of the amplifier.
In general, if more than two transistors are inclosed in the Miller compensation loop, then the minor loop itself will require compensation.
It is preferable to compensate the minor loop, if input cascode compensation is used, by shunting the input to the second stage to ground with 2.2nF in series with 4R7. This lag-lead network introduces a pole at a lower frequency, courtesy of the 2.2nF capacitor, which reduces the unity loop gain frequency while the 4R7 resistor introduces a zero in the vicinity of unity loop gain to further enhance stability margins. Phase shift at unity loop gain frequency in this case is only 119 degrees (blue trace)
Capacitively shunting the input to the second stage is preferable to shunting the output of the second stage because the latter compromises the slew rate of the amplifier.
In general, if more than two transistors are inclosed in the Miller compensation loop, then the minor loop itself will require compensation.
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Well, that's simulation for you. An indispensable tool, but no substitute for building the real thing. All the power amplifiers I designed for TAG-McLaren used cascode compensation in the form shown in the Fifth edition of APAD. There were no stability issues with any of them.
The component values on your schematic are too small to read. Maybe the answer lies in those values.
You can see the component values by downloading the ltspice file that I attached together with the models I used. You'll find they are the same component values used in your Blameless designs.
I still think cascode compensation is unstable unless the minor loop is itself compensated.
C13 and C14, at 100 uF each, with no softening resistance, are a little scary to me from a peak current and a local stability point of view. Is that something you've done in real life and sims? I'll admit straight away, that is an intuitive observation, based on neither simulation nor analysis...I'd just be interested to hear your experience with it...thanks...Dan
The component 'value' of the VAS/TIS degen. resistor (RE) is even smaller, i.e. zero Ohm (you couldn't have overlooked it
). Maybe the answer lies in this value.Hi Mike,
I agree with your concern. This is not completely unlike the situation with Miller Input Compensation (MIC) that I have discussed in two ways: 1) MIC eliminates the Cdom PSRR problem of conventional Miller compensation; 2) MIC has a minor loop that must be compensated. When the VAS input node is left to its own devices to have a pole not associated with compensation, the minor loop usually needs to be compensated.
I might add that Harry Dymond discussed this form of Miller compensation in his AES 2-pole compensation paper. He mentioned it specifically in connection with improving the negative rail PSRR. Perhaps Harry would like to chime in.
This form of compensation (taking Cdom to the emitter of the cascode) is very attractive, but there is no free lunch. It is not enough for one to say something like "I did it and it was stable". It may have worked by the Grace of God, but we may not always have a good idea of how close it is to the edge of instability. If a properly-done SPICE simulation suggests a stability problem, that should not be ignored.
Cheers,
Bob
I agree. As I said in general when the Miller compensation capacitor encloses more than two transistors, then the minor loop is likely to be unstable and must itself be compensated.
I'm guessing ... but are the BJTs completely different from Doug's?
I note you have made several changes to his circuit ... Oh! I forgot. You make only trivial changes that have no effect on stability or performance.
Which circuit in Doug's book is it based on?
But I'm probably missing your point. Michael, is that second model, the one on which you have 'cured' the instability, an example of what YOU consider good practice and good performance/stability??
If it is, I'm sure we will all be eager to download the .ASC and learn something.
Richard Lee may be reassured that a quick look at the models shows some rather implausible parameters.
Best wishes
David
So what? The small signal BJTs used shouldn't affect the result. Surely a man of your stature should know this?
Really? Such as what? Use any reliable models of your choice and see whether you arrive at a different result.
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Well, the very first line has a 2n3904 with a VAF of 1000V, about 10 or 20 times a plausible value. OK, not a transistor in the simulation but a bit of a worry to start.
The ZTX796a that you do use has a VAF of 450v that also seems implausible.
The ZTX1056a has a BR of 80, probably should be around 1 to 4.
Mainly a problem at low Vce. But that is exactly what those transistors will have, since they are in the current mirror.
The outputs have implausible VAFs too. This time about 10 times too low.
Probably not relevant in this particular issue but an obvious problem with the circuit.
The BF of one of the outputs is 438, about 3 times more than reasonable.
About then I decided to leave it to you.
Yes. I do actually share some concern about this.
But it would help if your models were reliable.
Best wishes
David
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I didn't use a 2n3904. I don't think the Zetex models are a problem; I've used them for years to troubleshoot real circuit problems succesfully.
As I said you can substitute any models you prefer and see whether you arrive at a different result; I would suggest you don't post anything until you've done so.
I don't think the Zetex models are a problem; I've used them for years to troubleshoot real circuit problems succesfully.As I said you can substitute any models you prefer and see whether you arrive at a different result; I would suggest you don't post anything until you've done so.
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But I think it might be enough for one to say "I did it in several amplifier designs, all of which were put into quantity production, and meticulously tested for stability as well as everything else before they left the factory, and never at any time showed any hint of instability."
I have to say I never noticed any sign of supernatural assistance in this process.
It seems to me that some of you are getting close to saying that the simulations must be right, so reality must be wrong.
I note there seems to be much concern about the simulation models used.
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