Bob Cordell's Power amplifier book

all these simulations ultimately mean very little

Would you not agree that if you don't even start from an amplifier that has decent gain and phase margins in a small-signal, 25 °C simulation in SPICE, that you are headed for disaster?

but if you're seriously interested in building something stable, durable, and reproducible, and that's still going to be performing somewhere around the initial requirements 10 years downstream, you're just wasting your time worrying about "memory distortion" et.al.

I think this may be completely wrong. If you build an amplifier free from memory distortion, that inherently means that temperature has zero effect on the transfer function of the amplifier.
 
Perhaps I am just looking at this a little to simply but it would seem that what is being called Thermal distortion and Memory distortion here are of two simple factors. Thermal distortion that we are calling instantaneous and following the signal would be dependent on the signal applied and the complex signal of the entire frequency response which would mean a differing time scale dependent on frequency. This so called memory distortion just sounds like a rise in temperature over a prolonged time with a continuous signal source causing the devices to heat up over time? Wouldn't the dissipation factor of the capacitance's have as much to do with this as anything else?
 
Try running a minor loop gain simulation with an ideal output stage (i.e. unity gain VCVS) and compare the results with those obtained with a non-ideal output stage with and without the output shunt RC network.

I suspect the instability of the the three transistor TIS is entirely due to the singularities introduced by the third transistor in the TIS loop and little or nothing to do with the output stage or its singularities.

Hi Mike,

I did previously simulate with an ideal VCVS output stage, and I can tell you for sure that the instability still exists in that case. So, as far as that goes, you are right - the instability does not depend on a real output stage being there.

However, having said that, it is clear that the presence of the output stage affects the behavior and degree of instability (and the frequency).

This was most apparent with my suggested stabilizing fix involving a series resistor (100 ohms) between the EF and the VAS base, and a capacitor from VAS cascode output to the VAS base (10pF). That worked great in the VCVS output stage example and worked terribly in the example with the real output stage.

There is definitely interaction between the output stage and the VAS instability.

Cheers,
Bob
 
I would be hesitant to assert that an a RC shunt network at the output of the amplifier mitigates instability in the minor loop. After all, said RC network is outside the minor loop and shouldn't have any effect on it.
Bob Cordell said:
One should not be surprized that the output Zobel affects circuit stability, based on the things we have seen so far. Without having seen those things, it might be non-intuitive that the Zobel would affect the minor loop stability, since the Triple would seem to be a quite effective buffer.

Unfortuantely, this is not the case. The minor loop is quite sensitive to the impedance at the output of the VAS - this should not be a surprize. At the same time, my blunder of at first using off-shelf OnSemi models for the middle EFs of the Triple demonstrates that sensitivity.
Bob is right. The Loop Gain(s major & minor) are ALL affected by what you stick on the output .. regardless/including Zobels, inductors etc.

The complex Open Loop Voltage Gain of an amplifier without compensation is roughly Gm [with a roll-off around ft] x BofVAS [roll-off(s) ft(s)/B(s)] x BofDrivers&Outputs [roll-offs ft(s)/B(s)] x LOAD [*]

Various compensation schemes only change the RELATIVE effect of load. That's why we test IN REAL LIFE with different loads to see if instability is provoked.

Even an evil Triple buffer gives up at some stage. In the meantime, it has 3 x 20dB/8ve with associated phase. That's why an evil triple output stage will always be 'less stable' than EF2 if both are properly implemented.
Try running a minor loop gain simulation with an ideal output stage (i.e. unity gain VCVS) and compare the results with those obtained with a non-ideal output stage with and without the output shunt RC network.
Buy these from Ye Olde Unobtainium Shoppe. Digikey & Mouser are out of stock :D


[*]Great Guru Baxandall introduced me to this way of thinking circa 1980. He was kind enough to indulge in quite voluminous correspondence with a young whippersnapper trying to impress him in da old days. In this Millenium, I feel Bob is similarly generous with his time, knowledge & experience. :)
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michaelkiwanuka said:
What is "strange" about my "currents, resistor values & operating points etc"?
Would you like to show us a distortion plot (sim will do) of your circuit with these "currents, resistor values & operating points etc"?

I'm not sure (cos you haven't posted anything you approve) but I think your favoured topology uses 'triples + single VAS'.

You can use that if its more convenient but "currents, resistor values & operating points etc" as close as possible to what you posted in #3170 please.
 
Thermal distorsion in the differential input stage ?

I checked this follower in real conditions. V+ is 30 V.

An externally hosted image should be here but it was not working when we last tested it.


The existence of modulation of the input stage transconductance by thermal variations should be shown by modifications of the distorsion harmonic content of the output when the thermal conditions of the input transistors are changed by varying their quiescent current.

I measured the distorsion for three different currents in the input stage CCS, at 2*2.9 mA, 2*0.9 mA and 2*0.3 mA.

Input sine signal is 1 kHz, 4 Vrms which is pretty more than the voltage usually submitted to an input stage.

Output load is 2 kOhm.

H2 H3 H4 H5 H7
sine generator... -142 -130.. -142 -136 -136.5
2*2.9 mA ........ -141 -130.5 -137 -132 -136
2*0.9 mA ........ -142 -130.5 -142 -132 -137
2*0.3 mA ........ -140 -130.. -141 -135 -136

Are the variations of the harmonic content really significative ?
 
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Bob is right. The Loop Gain(s major & minor) are ALL affected by what you stick on the output .. regardless/including Zobels, inductors etc.

I appreciate that the impedance you connect to the output affects major loop characteristics; however the minor loop is buffered from the load by a double or triple follower; I completely fail to appreciate how such a load would affect the minor loop's characteristics.


Would you like to show us a distortion plot (sim will do) of your circuit with these "currents, resistor values & operating points etc"?

I'm not sure (cos you haven't posted anything you approve) but I think your favoured topology uses 'triples + single VAS'.

You can use that if its more convenient but "currents, resistor values & operating points etc" as close as possible to what you posted in #3170 please.

Frankly, I can't be bothered. I'll leave that to you.
 
I appreciate that the impedance you connect to the output affects major loop characteristics; however the minor loop is buffered from the load by a double or triple follower; I completely fail to appreciate how such a load would affect the minor loop's characteristics.

Hi Mike,

The problem is that even the Triple output stage is a very imperfect buffer at high frequencies. In fact, the numbers get downright ugly at the frequencies in the range of the instabilities we are talking about, i.e., around 30MHz.

Consider a Triple EF output stage whose pre-driver transistor ft is 100MHz, whose driver ft is 30MHz, and whose output transistor ft is also 30MHz. This is a decent output triple. At 30MHz, magnitude of its total current gain is only 3.3. The 8-ohm load looks like maybe only 30 ohms or so to the VAS. Of course, the phase angle of its input impedance is also ugly. Not much of a buffer at these frequencies.

A REALLY fast Triple might have transistors with fts of 200MHz, 100MHz and 50MHz, respectively. Total current gain at 30MHz will be on the order of 35, so the input impedance when driving an 8 ohm load will still be only on the order of 280 ohms magnitude.

Cheers,
Bob
 
at 30 MHz looking into a dozen feet of zipcord the load on the far end may not be your only problem - could be worse if "audiophile" cable were involved

but you really should mostly be looking at your own amp internal wiring, Zobel, decoupling L

still don't understand fully the attraction of puting 8-10 Ohms in parallel with the decoupling L
 
The R in parallel with the output L/R keeps it from becoming a series resonator with the load capacitance, which could show very low impedance and full phase shift at that frequency. With larger output inductors this may be more of a concern. The amplifier's own output inductance can behave this way which is why we use the RC shunt at the output. Even if this does not cause instability, it may cause large currents to flow at the resonance dip.

Forr, thanks for the results. I'm not defending thermal distortion but I want to add my 2C to your results. For one, the BC3x7 have great SOA for a TO92, and probably large die size. IIRC they may use dies from larger-package devices. So thermal inertia will be significant. Your second LTP transistor has a very constant Pd relative to the other so the thermals of the LTP transistors will not cancel, so it seems even the uncanceled thermal effects are not significant at 1KHz.
 
so what? - nothing external but the negligible differential RF power the cable and loudspeaker loop area intercepts can drive that side

why wouldn't a 2nd Zobel after the inductor be better

from the amp side all we have is the amplified audio signal - if the amp is working as intended

so what's the point of the damping - other than to make the silly 70's vintage all filters removed square wave plots not show inaudible frequency ringing at the speaker terminals with un-realisitic pure C uF loads?

I keep pointing out that the electrostatic step-up transformer pri Z argument is all wet - they have series R, leakage L - nowhere near pure uF C
 
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michaelkiwanuka said:
What is "strange" about my 'currents, resistor values & operating points etc'?
Would you like to show us a distortion plot (sim will do) of your circuit with these "currents, resistor values & operating points etc"?
michaelkiwanuka said:
Frankly, I can't be bothered.
Well that's your answer. Most of us on this forum would find it strange if someone wasn't bothered if their 'currents, resistor values & operating points etc' resulted in poor THD & stability.

It appears that most (all?) of your circuits are of this ilk but I can't claim to have looked at everything you've posted. .. Your idea of 'poor' might be different from us unwashed masses too :)
 
so what? - nothing external but the negligible differential RF power the cable and loudspeaker intercepts can drive that side

why wouldn't a 2nd Zobel after the inductor be better

from the amp side all we have is the amplified audio signal - if the amp is working as intended

so what's the point of the damping - other than to make the silly 70's vintage all filters removed square wave plots not show inaudible frequency ringing with un-realisitic pure C uF loads?

This resistor is is necessary to make the amp stable with all output capacitances. A shunt damper may need to be too large to do the same thing. If oscillation is your main priority, the L/R is more efficient and targets the source of the problem whereas a shunt damper may only partly work. It absolutely depends on the design in question.

As far as resonances and the amp not passing RF to the output, this makes sense but it should be made clear you are betting on the low Q of the undamped resonance at the output. Can we be sure it will have low Q in all situations? Is that a guarantee you are comfortable making? I leave that up to you since I genuinely don't know. But I do know that the output L/R is more important than the RC shunt in my experience when it comes to capacitive loads.
 
R||L is "better" if you think uF pure C loads exist - and you have to drive them at ~100 kHz where they resonate with 1 uH series output decoupling L

2nd Zobel is better if RF attenuation in the MHz is considered useful and the 100 kHz LC resonance is believed to be a red herring
 
...
I usually use the "helpered" current mirror that is popular in integrated circuits, where an emitter follower is added to supply the base current of the two mirror transistors. This adds an extra Vbe of headroom to the transistor that is normally diode connected...

The problem I see is not in mirror balance, but output impedance. In the quasi-saturation region, collector impedance can be 500R for some transistors...

Hi Keantoken
Inspired by your recent obsession with this, I re-examined Bob's differential current mirror (p146) and noticed it also increases the Vce of the Current Mirror transistors. Problem fixed;)

Bob
Was that a deliberate decision or a lucky side effect?

Best wishes
David
 
I like that configuration, I just try to do as good with less parts.

If you look at the KSA992 datasheet, you can see that Zc is about .5V/Ic up to 1V Vce. We can't tell exactly what Zc will be at 1.2V, BUT we know that the further you are from the knee, the higher it will be. One option is to increase Vce, the other is to decrease the knee, by choosing a better device. The KSA992 is obviously not ideal for a low-Vce current mirror. I wonder what device Bob would have used there?

http://www.fairchildsemi.com/ds/KS/KSA992.pdf